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authorMikhail Ulyanov <mikhail.ulyanov@cogentembedded.com>2014-08-19 14:50:49 +0200
committerSimon Horman <horms+renesas@verge.net.au>2014-08-22 03:49:39 +0200
commitda076a888ab19f13816372796ed231e7d6ff5fed (patch)
tree675b3b499665a183ddcc317a08d3dde39e9889c7 /arch/arm/boot/dts/r8a7790.dtsi
parentARM: shmobile: lager: add VIN1/ADV7180 device nodes (diff)
downloadlinux-da076a888ab19f13816372796ed231e7d6ff5fed.tar.xz
linux-da076a888ab19f13816372796ed231e7d6ff5fed.zip
ARM: shmobile: r8a7790: Add JPU clock dt and CPG define.
Signed-off-by: Mikhail Ulyanov <mikhail.ulyanov@cogentembedded.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch/arm/boot/dts/r8a7790.dtsi')
-rw-r--r--arch/arm/boot/dts/r8a7790.dtsi6
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index 2278bd0968d1..c11541d6dc25 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -836,17 +836,17 @@
mstp1_clks: mstp1_clks@e6150134 {
compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
reg = <0 0xe6150134 0 4>, <0 0xe6150038 0 4>;
- clocks = <&p_clk>, <&p_clk>, <&p_clk>, <&rclk_clk>,
+ clocks = <&m2_clk>, <&p_clk>, <&p_clk>, <&p_clk>, <&rclk_clk>,
<&cp_clk>, <&zs_clk>, <&zs_clk>, <&zs_clk>,
<&zs_clk>;
#clock-cells = <1>;
renesas,clock-indices = <
- R8A7790_CLK_TMU1 R8A7790_CLK_TMU3 R8A7790_CLK_TMU2
+ R8A7790_CLK_JPU R8A7790_CLK_TMU1 R8A7790_CLK_TMU3 R8A7790_CLK_TMU2
R8A7790_CLK_CMT0 R8A7790_CLK_TMU0 R8A7790_CLK_VSP1_DU1
R8A7790_CLK_VSP1_DU0 R8A7790_CLK_VSP1_R R8A7790_CLK_VSP1_S
>;
clock-output-names =
- "tmu1", "tmu3", "tmu2", "cmt0", "tmu0", "vsp1-du1",
+ "jpu", "tmu1", "tmu3", "tmu2", "cmt0", "tmu0", "vsp1-du1",
"vsp1-du0", "vsp1-rt", "vsp1-sy";
};
mstp2_clks: mstp2_clks@e6150138 {