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author | Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> | 2014-01-07 09:22:56 +0100 |
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committer | Simon Horman <horms+renesas@verge.net.au> | 2014-02-04 02:16:59 +0100 |
commit | 65f05c38749f393f775c360b9b247fa4d63b72de (patch) | |
tree | 1ccd4dd07c4ac06dedb0f443cfe884cd689100d8 /arch/arm/boot/dts/r8a7791.dtsi | |
parent | ARM: shmobile: r8a7790: Add SATA clocks to device tree (diff) | |
download | linux-65f05c38749f393f775c360b9b247fa4d63b72de.tar.xz linux-65f05c38749f393f775c360b9b247fa4d63b72de.zip |
ARM: shmobile: r8a7791: Add SATA clocks to device tree
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Tested-by: Valentine Barshak <valentine.barshak@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch/arm/boot/dts/r8a7791.dtsi')
-rw-r--r-- | arch/arm/boot/dts/r8a7791.dtsi | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi index 93c6f4d2866c..94e3cc17448c 100644 --- a/arch/arm/boot/dts/r8a7791.dtsi +++ b/arch/arm/boot/dts/r8a7791.dtsi @@ -655,13 +655,15 @@ mstp8_clks: mstp8_clks@e6150990 { compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks"; reg = <0 0xe6150990 0 4>, <0 0xe61509a0 0 4>; - clocks = <&zg_clk>, <&zg_clk>, <&zg_clk>, <&p_clk>; + clocks = <&zg_clk>, <&zg_clk>, <&zg_clk>, <&p_clk>, <&zs_clk>, + <&zs_clk>; #clock-cells = <1>; renesas,clock-indices = < R8A7791_CLK_VIN2 R8A7791_CLK_VIN1 R8A7791_CLK_VIN0 - R8A7791_CLK_ETHER + R8A7791_CLK_ETHER R8A7791_CLK_SATA1 R8A7791_CLK_SATA0 >; - clock-output-names = "vin2", "vin1", "vin0", "ether"; + clock-output-names = + "vin2", "vin1", "vin0", "ether", "sata1", "sata0"; }; mstp9_clks: mstp9_clks@e6150994 { compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks"; |