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authorGeert Uytterhoeven <geert+renesas@glider.be>2017-08-18 11:11:37 +0200
committerSimon Horman <horms+renesas@verge.net.au>2017-09-18 08:05:07 +0200
commitd77fe953768850557a1851d2c933b76b2083e4d5 (patch)
tree04fbd504276dfdc9e96cf513efc685d810de1553 /arch/arm/boot/dts/r8a7793-gose.dts
parentARM: dts: r8a7792: Convert to new CPG/MSSR bindings (diff)
downloadlinux-d77fe953768850557a1851d2c933b76b2083e4d5.tar.xz
linux-d77fe953768850557a1851d2c933b76b2083e4d5.zip
ARM: dts: r8a7793: Convert to new CPG/MSSR bindings
Convert the R-Car M2-N SoC from the old "Renesas R-Car Gen2 Clock Pulse Generator (CPG)", "Renesas CPG DIV6 Clock", and "Renesas CPG Module Stop (MSTP) Clocks" DT bindings to the new unified "Renesas Clock Pulse Generator / Module Standby and Software Reset" DT bindings. This simplifies the DTS files, and allows to add support for reset control later. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch/arm/boot/dts/r8a7793-gose.dts')
-rw-r--r--arch/arm/boot/dts/r8a7793-gose.dts4
1 files changed, 1 insertions, 3 deletions
diff --git a/arch/arm/boot/dts/r8a7793-gose.dts b/arch/arm/boot/dts/r8a7793-gose.dts
index 76e3aca2029e..51b3ffac8efa 100644
--- a/arch/arm/boot/dts/r8a7793-gose.dts
+++ b/arch/arm/boot/dts/r8a7793-gose.dts
@@ -303,9 +303,7 @@
pinctrl-names = "default";
status = "okay";
- clocks = <&mstp7_clks R8A7793_CLK_DU0>,
- <&mstp7_clks R8A7793_CLK_DU1>,
- <&mstp7_clks R8A7793_CLK_LVDS0>,
+ clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>, <&cpg CPG_MOD 726>,
<&x13_clk>, <&x2_clk>;
clock-names = "du.0", "du.1", "lvds.0",
"dclkin.0", "dclkin.1";