diff options
author | Magnus Damm <damm+renesas@opensource.se> | 2015-11-16 09:57:29 +0100 |
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committer | Simon Horman <horms+renesas@verge.net.au> | 2015-11-17 19:32:06 +0100 |
commit | 876e7fb9f418fd86719af345febf8656c47e833c (patch) | |
tree | 83b388226c5bcfa1efb3fa8aa43f61dd603a5b7a /arch/arm/boot/dts/r8a7794-alt.dts | |
parent | ARM: shmobile: r8a7794: Add DU node to device tree (diff) | |
download | linux-876e7fb9f418fd86719af345febf8656c47e833c.tar.xz linux-876e7fb9f418fd86719af345febf8656c47e833c.zip |
ARM: shmobile: r8a7794: alt: Enable VGA port
Enable the DU device and the VGA port available on the r8a7794
ALT board. The VGA portion of the ALT board is somewhat similar
to the Lager board but in case of ALT the DU1 pins are used
and the X2 clock has a reduced frequency.
This patch does not include any pinctrl (PFC) settings due to lack
of PFC DT integration on r8a7794. At this point the default state
of the boot loader is enough to keep the VGA port working without
changing any pinctrl settings.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch/arm/boot/dts/r8a7794-alt.dts')
-rw-r--r-- | arch/arm/boot/dts/r8a7794-alt.dts | 61 |
1 files changed, 61 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/r8a7794-alt.dts b/arch/arm/boot/dts/r8a7794-alt.dts index 928cfa641475..a548007b9b10 100644 --- a/arch/arm/boot/dts/r8a7794-alt.dts +++ b/arch/arm/boot/dts/r8a7794-alt.dts @@ -33,6 +33,67 @@ #address-cells = <1>; #size-cells = <1>; }; + + vga-encoder { + compatible = "adi,adv7123"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + adv7123_in: endpoint { + remote-endpoint = <&du_out_rgb1>; + }; + }; + port@1 { + reg = <1>; + adv7123_out: endpoint { + remote-endpoint = <&vga_in>; + }; + }; + }; + }; + + vga { + compatible = "vga-connector"; + + port { + vga_in: endpoint { + remote-endpoint = <&adv7123_out>; + }; + }; + }; + + x2_clk: x2-clock { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <74250000>; + }; + + x13_clk: x13-clock { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <148500000>; + }; +}; + +&du { + status = "okay"; + + clocks = <&mstp7_clks R8A7794_CLK_DU0>, + <&mstp7_clks R8A7794_CLK_DU0>, + <&x13_clk>, <&x2_clk>; + clock-names = "du.0", "du.1", "dclkin.0", "dclkin.1"; + + ports { + port@1 { + endpoint { + remote-endpoint = <&adv7123_in>; + }; + }; + }; }; &extal_clk { |