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authorCaesar Wang <wxt@rock-chips.com>2016-01-15 14:49:52 +0100
committerHeiko Stuebner <heiko@sntech.de>2016-01-24 23:28:23 +0100
commit99dc9fdc3105116b46273577e9641d7304b3046e (patch)
tree27eb64077c5f8573183ca3ebd30e7fbbeef010dd /arch/arm/boot/dts/rk3036-kylin.dts
parentARM: dts: rockchip: enable the uart0 for kylin board (diff)
downloadlinux-99dc9fdc3105116b46273577e9641d7304b3046e.tar.xz
linux-99dc9fdc3105116b46273577e9641d7304b3046e.zip
ARM: dts: rockchip: enable the high speed on sdio for kylin board
We want to the higher speed for wifi module working. Bootup kernel log: ... mmc_host mmc0: Bus speed (slot 0) = 37125000Hz (slot req 37500000Hz, actual 37125000HZ div = 0) or run 'cat /sys/kernel/debug/clk/clk_summary |grep phase -C 1' to check Otherwise, the mmc0 will run 400khz defalult value to work. Signed-off-by: Caesar Wang <wxt@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'arch/arm/boot/dts/rk3036-kylin.dts')
-rw-r--r--arch/arm/boot/dts/rk3036-kylin.dts5
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/rk3036-kylin.dts b/arch/arm/boot/dts/rk3036-kylin.dts
index c748d2cbeed6..905e187da381 100644
--- a/arch/arm/boot/dts/rk3036-kylin.dts
+++ b/arch/arm/boot/dts/rk3036-kylin.dts
@@ -299,6 +299,7 @@
broken-cd;
bus-width = <4>;
+ cap-sd-highspeed;
cap-sdio-irq;
default-sample-phase = <90>;
keep-power-in-suspend;
@@ -306,6 +307,10 @@
num-slots = <1>;
pinctrl-names = "default";
pinctrl-0 = <&sdio_clk &sdio_cmd &sdio_bus4>;
+ sd-uhs-sdr12;
+ sd-uhs-sdr25;
+ sd-uhs-sdr50;
+ sd-uhs-sdr104;
};
&uart0 {