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author | Heiko Stuebner <heiko@sntech.de> | 2014-06-24 20:12:06 +0200 |
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committer | Heiko Stuebner <heiko@sntech.de> | 2014-07-26 23:35:29 +0200 |
commit | 9cdffd8cb9b5f30495a9c284ab05d5b803f3b457 (patch) | |
tree | aff9869175fd8962e7378b27ffd9556b39354577 /arch/arm/boot/dts/rk3066a.dtsi | |
parent | ARM: dts: rockchip: oder nodes by register address (diff) | |
download | linux-9cdffd8cb9b5f30495a9c284ab05d5b803f3b457.tar.xz linux-9cdffd8cb9b5f30495a9c284ab05d5b803f3b457.zip |
ARM: dts: add rk3066 and rk3188 i2c device nodes and pinctrl settings
The core controller settings themself are identical, only the compatible and
pinctrl settings differ.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'arch/arm/boot/dts/rk3066a.dtsi')
-rw-r--r-- | arch/arm/boot/dts/rk3066a.dtsi | 60 |
1 files changed, 60 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/rk3066a.dtsi b/arch/arm/boot/dts/rk3066a.dtsi index 21b87dece38c..18e802c08a91 100644 --- a/arch/arm/boot/dts/rk3066a.dtsi +++ b/arch/arm/boot/dts/rk3066a.dtsi @@ -179,6 +179,41 @@ bias-disable; }; + i2c0 { + i2c0_xfer: i2c0-xfer { + rockchip,pins = <RK_GPIO2 28 RK_FUNC_1 &pcfg_pull_none>, + <RK_GPIO2 29 RK_FUNC_1 &pcfg_pull_none>; + }; + }; + + i2c1 { + i2c1_xfer: i2c1-xfer { + rockchip,pins = <RK_GPIO2 30 RK_FUNC_1 &pcfg_pull_none>, + <RK_GPIO2 31 RK_FUNC_1 &pcfg_pull_none>; + }; + }; + + i2c2 { + i2c2_xfer: i2c2-xfer { + rockchip,pins = <RK_GPIO3 0 RK_FUNC_1 &pcfg_pull_none>, + <RK_GPIO3 1 RK_FUNC_1 &pcfg_pull_none>; + }; + }; + + i2c3 { + i2c3_xfer: i2c3-xfer { + rockchip,pins = <RK_GPIO3 2 RK_FUNC_2 &pcfg_pull_none>, + <RK_GPIO3 3 RK_FUNC_2 &pcfg_pull_none>; + }; + }; + + i2c4 { + i2c4_xfer: i2c4-xfer { + rockchip,pins = <RK_GPIO3 4 RK_FUNC_1 &pcfg_pull_none>, + <RK_GPIO3 5 RK_FUNC_1 &pcfg_pull_none>; + }; + }; + uart0 { uart0_xfer: uart0-xfer { rockchip,pins = <RK_GPIO1 0 RK_FUNC_1 &pcfg_pull_default>, @@ -292,6 +327,31 @@ }; }; +&i2c0 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c0_xfer>; +}; + +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_xfer>; +}; + +&i2c2 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c2_xfer>; +}; + +&i2c3 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c3_xfer>; +}; + +&i2c4 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c4_xfer>; +}; + &mmc0 { pinctrl-names = "default"; pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_cd &sd0_bus4>; |