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| author | Shawn Lin <shawn.lin@rock-chips.com> | 2016-09-23 02:09:10 +0200 |
|---|---|---|
| committer | Heiko Stuebner <heiko@sntech.de> | 2016-10-16 02:42:43 +0200 |
| commit | 3a2766cc68e7caa564e1bd56376d2a13cfa687c4 (patch) | |
| tree | 5010773747cae6a64d2b040a357dcaf366c0e441 /arch/arm/boot/dts/rk3188-px3-evb.dts | |
| parent | ARM: dts: rockchip: update compatible strings for Rockchip efuse (diff) | |
| download | linux-3a2766cc68e7caa564e1bd56376d2a13cfa687c4.tar.xz linux-3a2766cc68e7caa564e1bd56376d2a13cfa687c4.zip | |
ARM: dts: rockchip: remove always-on and boot-on from vcc_sd for px3-evb
Please don't add these for vcc_sd, and mmc-core/driver will control
it. Otherwise, it will waste energy even without sdmmc in slot.
Moreover, it will causes a bug:
If we insert/remove sd card, we could see
[9.337271] mmc0: new ultra high speed SDR25 SDHC card at address 0007
[9.345144] mmcblk0: mmc0:0007 SD32G 29.3 GiB
This is okay for normal sd insert/remove test, but when I debug some
issues for sdmmc, I did unbind/bind test. And there is a interesting
phenomenon when we bind the driver again:
[58.314069] mmc0: new high speed SDHC card at address 0007
[58.320282] mmcblk0: mmc0:0007 SD32G 29.3 GiB
So the sd card could just support high speed without power cycle
since the vcc_sd is always on, which makes the sd card fail to
reinit its internal ocr mask.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'arch/arm/boot/dts/rk3188-px3-evb.dts')
| -rw-r--r-- | arch/arm/boot/dts/rk3188-px3-evb.dts | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/rk3188-px3-evb.dts b/arch/arm/boot/dts/rk3188-px3-evb.dts index 79a5f17b1694..df727bafd6dc 100644 --- a/arch/arm/boot/dts/rk3188-px3-evb.dts +++ b/arch/arm/boot/dts/rk3188-px3-evb.dts @@ -219,8 +219,6 @@ }; vcc_sd: LDO_REG7 { - regulator-always-on; - regulator-boot-on; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <3300000>; regulator-name = "vcc_sd"; |