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authorHeiko Stuebner <heiko@sntech.de>2014-09-10 17:04:36 +0200
committerHeiko Stuebner <heiko@sntech.de>2014-09-13 20:28:17 +0200
commit4ff4ae1258a9d091e3ab4e467ca101cd6f0ccdd0 (patch)
tree56fcc27b4f86e42b7e3a81ce9b3d76457ead1f6e /arch/arm/boot/dts/rk3188.dtsi
parentARM: dts: rockchip: add Cortex-A9 SPI controller nodes (diff)
downloadlinux-4ff4ae1258a9d091e3ab4e467ca101cd6f0ccdd0.tar.xz
linux-4ff4ae1258a9d091e3ab4e467ca101cd6f0ccdd0.zip
ARM: dts: rockchip: add emmc nodes for rk3066 and rk3188
Add the controller node, pinctrl settings for the customizable pins and sort the controllers like on rk3288 as emmc, sdmmc, sdio for handling convenience. Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'arch/arm/boot/dts/rk3188.dtsi')
-rw-r--r--arch/arm/boot/dts/rk3188.dtsi21
1 files changed, 21 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/rk3188.dtsi b/arch/arm/boot/dts/rk3188.dtsi
index 573ef6129fb4..9a1ff0b7ea1e 100644
--- a/arch/arm/boot/dts/rk3188.dtsi
+++ b/arch/arm/boot/dts/rk3188.dtsi
@@ -147,6 +147,27 @@
bias-disable;
};
+ emmc {
+ emmc_clk: emmc-clk {
+ rockchip,pins = <RK_GPIO0 24 RK_FUNC_2 &pcfg_pull_default>;
+ };
+
+ emmc_cmd: emmc-cmd {
+ rockchip,pins = <RK_GPIO0 26 RK_FUNC_2 &pcfg_pull_default>;
+ };
+
+ emmc_rst: emmc-rst {
+ rockchip,pins = <RK_GPIO0 27 RK_FUNC_2 &pcfg_pull_default>;
+ };
+
+ /*
+ * The data pins are shared between nandc and emmc and
+ * not accessible through pinctrl. Also they should've
+ * been already set correctly by firmware, as
+ * flash/emmc is the boot-device.
+ */
+ };
+
i2c0 {
i2c0_xfer: i2c0-xfer {
rockchip,pins = <RK_GPIO1 24 RK_FUNC_1 &pcfg_pull_none>,