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| author | Frank Wang <frank.wang@rock-chips.com> | 2017-06-22 12:29:56 +0200 |
|---|---|---|
| committer | Heiko Stuebner <heiko@sntech.de> | 2017-07-16 17:08:58 +0200 |
| commit | 0ae92144c636ca8c6ae4cce2b46ce816162b5d47 (patch) | |
| tree | d32310b7afbabeeefa044eaa67a7b6dff3972c12 /arch/arm/boot/dts/rk322x.dtsi | |
| parent | ARM: dts: rockchip: remove num-slots from all platforms (diff) | |
| download | linux-0ae92144c636ca8c6ae4cce2b46ce816162b5d47.tar.xz linux-0ae92144c636ca8c6ae4cce2b46ce816162b5d47.zip | |
ARM: dts: rockchip: add cpu enable method for rk3228 SoC
This patch sets PSCI as the default cpu enable-method for RK3228 SoC.
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'arch/arm/boot/dts/rk322x.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/rk322x.dtsi | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi index 003efe3ac241..d565b9581b00 100644 --- a/arch/arm/boot/dts/rk322x.dtsi +++ b/arch/arm/boot/dts/rk322x.dtsi @@ -70,6 +70,7 @@ #cooling-cells = <2>; /* min followed by max */ clock-latency = <40000>; clocks = <&cru ARMCLK>; + enable-method = "psci"; }; cpu1: cpu@f01 { @@ -78,6 +79,7 @@ reg = <0xf01>; resets = <&cru SRST_CORE1>; operating-points-v2 = <&cpu0_opp_table>; + enable-method = "psci"; }; cpu2: cpu@f02 { @@ -86,6 +88,7 @@ reg = <0xf02>; resets = <&cru SRST_CORE2>; operating-points-v2 = <&cpu0_opp_table>; + enable-method = "psci"; }; cpu3: cpu@f03 { @@ -94,6 +97,7 @@ reg = <0xf03>; resets = <&cru SRST_CORE3>; operating-points-v2 = <&cpu0_opp_table>; + enable-method = "psci"; }; }; @@ -151,6 +155,11 @@ interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; }; + psci { + compatible = "arm,psci-1.0", "arm,psci-0.2"; + method = "smc"; + }; + timer { compatible = "arm,armv7-timer"; arm,cpu-registers-not-fw-configured; |