summaryrefslogtreecommitdiffstats
path: root/arch/arm/boot/dts/rk3288-firefly.dtsi
diff options
context:
space:
mode:
authorWadim Egorov <w.egorov@phytec.de>2016-01-21 13:57:13 +0100
committerHeiko Stuebner <heiko@sntech.de>2016-01-25 09:17:32 +0100
commit296759c91e60c7fc84708d926161ee928697b0eb (patch)
tree243807e510fe98ada03a6f1bcbc19d9922e2148e /arch/arm/boot/dts/rk3288-firefly.dtsi
parentdt-bindings: rockchip-dw-mshc: add RK3368 dw-mshc description (diff)
downloadlinux-296759c91e60c7fc84708d926161ee928697b0eb.tar.xz
linux-296759c91e60c7fc84708d926161ee928697b0eb.zip
ARM: dts: rockchip: Bump sd card pin drive strength up on firefly boards
It seems some firefly boards need 12mA drive strength for sdmmc. Using 4mA/8mA drive strength will cause the kernel to fail to recognize the sd card correctly. Increased the sdmmc lines drive strength from 4mA to 12mA. Signed-off-by: Wadim Egorov <w.egorov@phytec.de> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'arch/arm/boot/dts/rk3288-firefly.dtsi')
-rw-r--r--arch/arm/boot/dts/rk3288-firefly.dtsi24
1 files changed, 24 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/rk3288-firefly.dtsi b/arch/arm/boot/dts/rk3288-firefly.dtsi
index 4e3fd9aefe34..49ec20d24082 100644
--- a/arch/arm/boot/dts/rk3288-firefly.dtsi
+++ b/arch/arm/boot/dts/rk3288-firefly.dtsi
@@ -408,6 +408,11 @@
output-low;
};
+ pcfg_pull_up_drv_12ma: pcfg-pull-up-drv-12ma {
+ bias-pull-up;
+ drive-strength = <12>;
+ };
+
act8846 {
pwr_hold: pwr-hold {
rockchip,pins = <0 1 RK_FUNC_GPIO &pcfg_output_high>;
@@ -457,6 +462,25 @@
};
sdmmc {
+ /*
+ * Default drive strength isn't enough to achieve even
+ * high-speed mode on firefly board so bump up to 12ma.
+ */
+ sdmmc_bus4: sdmmc-bus4 {
+ rockchip,pins = <6 16 RK_FUNC_1 &pcfg_pull_up_drv_12ma>,
+ <6 17 RK_FUNC_1 &pcfg_pull_up_drv_12ma>,
+ <6 18 RK_FUNC_1 &pcfg_pull_up_drv_12ma>,
+ <6 19 RK_FUNC_1 &pcfg_pull_up_drv_12ma>;
+ };
+
+ sdmmc_clk: sdmmc-clk {
+ rockchip,pins = <6 20 RK_FUNC_1 &pcfg_pull_none_12ma>;
+ };
+
+ sdmmc_cmd: sdmmc-cmd {
+ rockchip,pins = <6 21 RK_FUNC_1 &pcfg_pull_up_drv_12ma>;
+ };
+
sdmmc_pwr: sdmmc-pwr {
rockchip,pins = <7 11 RK_FUNC_GPIO &pcfg_pull_none>;
};