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| author | Matthias Kaehlcke <mka@chromium.org> | 2019-04-10 01:14:05 +0200 |
|---|---|---|
| committer | Heiko Stuebner <heiko@sntech.de> | 2019-04-11 13:37:47 +0200 |
| commit | 280fa349757bb240c650882feee5a861150ccc2d (patch) | |
| tree | e906aab8b0115f64b4a1114615805654f11b17ec /arch/arm/boot/dts/rk3288-veyron-chromebook.dtsi | |
| parent | ARM: dts: rockchip: Remove unnecessary setting of UART0 SCLK rate on veyron (diff) | |
| download | linux-280fa349757bb240c650882feee5a861150ccc2d.tar.xz linux-280fa349757bb240c650882feee5a861150ccc2d.zip | |
ARM: dts: rockchip: Add BT_EN to the power sequence for veyron
Add GPIO D5 (BT_ENABLE_L) as reset-GPIO to the power sequence for the
Bluetooth/WiFi module. On devices with a Broadcom module the signal
needs to be asserted to use Bluetooth.
Note that BT_ENABLE_L is a misnomer in the schematics, the signal
actually is active-high.
Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'arch/arm/boot/dts/rk3288-veyron-chromebook.dtsi')
0 files changed, 0 insertions, 0 deletions