diff options
| author | Romain Perier <romain.perier@gmail.com> | 2015-07-22 07:44:06 +0200 |
|---|---|---|
| committer | Heiko Stuebner <heiko@sntech.de> | 2015-07-22 10:58:17 +0200 |
| commit | 117ccc11ac271e446e6f0d65ed75d426a376ad45 (patch) | |
| tree | cbe8017b1631949572834938a3ac9b0e3fab4f6e /arch/arm/boot/dts/rk3288-veyron.dtsi | |
| parent | ARM: dts: rockchip: add rk3288 arm-pmu irq affinity (diff) | |
| download | linux-117ccc11ac271e446e6f0d65ed75d426a376ad45.tar.xz linux-117ccc11ac271e446e6f0d65ed75d426a376ad45.zip | |
ARM: dts: rockchip: Use correct dts properties for tsadc node on veyron
tsadc-tshut-mode and tsadc-tshut-polarity properties don't exist. The rockchip
thermal driver looks for rockchip,hw-tshut-mode and rockchip,hw-tshut-polarity
instead, otherwise it might freeze or hang the device according to the default
mode or polarity used.
Signed-off-by: Romain Perier <romain.perier@gmail.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'arch/arm/boot/dts/rk3288-veyron.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/rk3288-veyron.dtsi | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/rk3288-veyron.dtsi b/arch/arm/boot/dts/rk3288-veyron.dtsi index 97af57742316..2fa7a0dc83f7 100644 --- a/arch/arm/boot/dts/rk3288-veyron.dtsi +++ b/arch/arm/boot/dts/rk3288-veyron.dtsi @@ -367,8 +367,8 @@ &tsadc { status = "okay"; - tsadc-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */ - tsadc-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */ + rockchip,hw-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */ + rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */ }; &uart0 { |