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author | Katsuhiro Suzuki <katsuhiro@katsuster.net> | 2020-03-15 10:51:15 +0100 |
---|---|---|
committer | Heiko Stuebner <heiko@sntech.de> | 2020-03-17 01:20:22 +0100 |
commit | 3425fe335c29310f6628faf9a7947d07f32d8962 (patch) | |
tree | f48c2e124c40fa5a9cfdfa4cff2a5252fedbf8a2 /arch/arm/boot/dts/rk3288.dtsi | |
parent | ARM: dts: rockchip: rk3xxx: fix L2 cache-controller nodename (diff) | |
download | linux-3425fe335c29310f6628faf9a7947d07f32d8962.tar.xz linux-3425fe335c29310f6628faf9a7947d07f32d8962.zip |
ARM: dts: rockchip: use DMA channels for UARTs for RK3288
This patch enables to use DMAC for all UARTs that are connected to
dmac_peri core for Rochchip RK3288.
Only uart2 is connected different DMAC (dmac_bus_s) so keep current
settings on this patch.
Signed-off-by: Katsuhiro Suzuki <katsuhiro@katsuster.net>
Link: https://lore.kernel.org/r/20200315095115.10106-1-katsuhiro@katsuster.net
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'arch/arm/boot/dts/rk3288.dtsi')
-rw-r--r-- | arch/arm/boot/dts/rk3288.dtsi | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi index 8bcb4a51682e..e9f8a44f5f2a 100644 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi @@ -420,6 +420,8 @@ reg-io-width = <4>; clocks = <&cru SCLK_UART0>, <&cru PCLK_UART0>; clock-names = "baudclk", "apb_pclk"; + dmas = <&dmac_peri 1>, <&dmac_peri 2>; + dma-names = "tx", "rx"; pinctrl-names = "default"; pinctrl-0 = <&uart0_xfer>; status = "disabled"; @@ -433,6 +435,8 @@ reg-io-width = <4>; clocks = <&cru SCLK_UART1>, <&cru PCLK_UART1>; clock-names = "baudclk", "apb_pclk"; + dmas = <&dmac_peri 3>, <&dmac_peri 4>; + dma-names = "tx", "rx"; pinctrl-names = "default"; pinctrl-0 = <&uart1_xfer>; status = "disabled"; @@ -459,6 +463,8 @@ reg-io-width = <4>; clocks = <&cru SCLK_UART3>, <&cru PCLK_UART3>; clock-names = "baudclk", "apb_pclk"; + dmas = <&dmac_peri 7>, <&dmac_peri 8>; + dma-names = "tx", "rx"; pinctrl-names = "default"; pinctrl-0 = <&uart3_xfer>; status = "disabled"; @@ -472,6 +478,8 @@ reg-io-width = <4>; clocks = <&cru SCLK_UART4>, <&cru PCLK_UART4>; clock-names = "baudclk", "apb_pclk"; + dmas = <&dmac_peri 9>, <&dmac_peri 10>; + dma-names = "tx", "rx"; pinctrl-names = "default"; pinctrl-0 = <&uart4_xfer>; status = "disabled"; |