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author | Heiko Stübner <heiko@sntech.de> | 2014-08-14 23:01:50 +0200 |
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committer | Heiko Stuebner <heiko@sntech.de> | 2014-09-02 22:28:32 +0200 |
commit | ac42f481b75b98076b47fac60796657508f80abe (patch) | |
tree | de76fda32f61764995b17db067e2a459f92a9637 /arch/arm/boot/dts/rk3xxx.dtsi | |
parent | ARM: dts: rockchip: add rk3288 dma controllers (diff) | |
download | linux-ac42f481b75b98076b47fac60796657508f80abe.tar.xz linux-ac42f481b75b98076b47fac60796657508f80abe.zip |
ARM: dts: rockchip: add rk3066 and rk3188 dma controllers
Add both the cpu and peripheral pl330 dma controllers present in rk3188 socs.
The first dma controller can change between secure and non-secure mode. Both
instances are added but the non-secure variant is left disabled by default,
as on the majority of boards the bootloader leaves it in secure mode.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'arch/arm/boot/dts/rk3xxx.dtsi')
-rw-r--r-- | arch/arm/boot/dts/rk3xxx.dtsi | 38 |
1 files changed, 38 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/rk3xxx.dtsi b/arch/arm/boot/dts/rk3xxx.dtsi index 8caf85d83901..b5bd3a6593ef 100644 --- a/arch/arm/boot/dts/rk3xxx.dtsi +++ b/arch/arm/boot/dts/rk3xxx.dtsi @@ -28,6 +28,44 @@ i2c4 = &i2c4; }; + amba { + compatible = "arm,amba-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + dmac1_s: dma-controller@20018000 { + compatible = "arm,pl330", "arm,primecell"; + reg = <0x20018000 0x4000>; + interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>; + #dma-cells = <1>; + clocks = <&cru ACLK_DMA1>; + clock-names = "apb_pclk"; + }; + + dmac1_ns: dma-controller@2001c000 { + compatible = "arm,pl330", "arm,primecell"; + reg = <0x2001c000 0x4000>; + interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>; + #dma-cells = <1>; + clocks = <&cru ACLK_DMA1>; + clock-names = "apb_pclk"; + status = "disabled"; + }; + + dmac2: dma-controller@20078000 { + compatible = "arm,pl330", "arm,primecell"; + reg = <0x20078000 0x4000>; + interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>; + #dma-cells = <1>; + clocks = <&cru ACLK_DMA2>; + clock-names = "apb_pclk"; + }; + }; + xin24m: oscillator { compatible = "fixed-clock"; clock-frequency = <24000000>; |