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| author | Heiko Stuebner <heiko@sntech.de> | 2014-07-30 10:16:17 +0200 |
|---|---|---|
| committer | Heiko Stuebner <heiko@sntech.de> | 2014-07-30 12:14:44 +0200 |
| commit | eb2b9d47dd907eba5d766d942723811393454346 (patch) | |
| tree | ec13560c687ea829cfa27611c00b3de885ddec6b /arch/arm/boot/dts/rk3xxx.dtsi | |
| parent | ARM: dts: rockchip: remove pinctrl setting from radxarock uart2 (diff) | |
| download | linux-eb2b9d47dd907eba5d766d942723811393454346.tar.xz linux-eb2b9d47dd907eba5d766d942723811393454346.zip | |
ARM: dts: rockchip: add watchdog node
This adds the Designware compatible watchdog found on RK3xxx Cortex-A9 SoCs.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'arch/arm/boot/dts/rk3xxx.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/rk3xxx.dtsi | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/rk3xxx.dtsi b/arch/arm/boot/dts/rk3xxx.dtsi index c6f05610ed2d..8caf85d83901 100644 --- a/arch/arm/boot/dts/rk3xxx.dtsi +++ b/arch/arm/boot/dts/rk3xxx.dtsi @@ -174,6 +174,14 @@ status = "disabled"; }; + wdt: watchdog@2004c000 { + compatible = "snps,dw-wdt"; + reg = <0x2004c000 0x100>; + clocks = <&cru PCLK_WDT>; + interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>; + status = "disabled"; + }; + pwm2: pwm@20050020 { compatible = "rockchip,rk2928-pwm"; reg = <0x20050020 0x10>; |