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authorNicolas Ferre <nicolas.ferre@atmel.com>2015-12-01 14:42:37 +0100
committerNicolas Ferre <nicolas.ferre@atmel.com>2015-12-15 12:20:24 +0100
commitbdf9a4d3037fede143fc4b732debc77e9376dc58 (patch)
tree944e5b4d712a8e8a44a55c788206ee53cf72b1d8 /arch/arm/boot/dts/sama5d4.dtsi
parentARM: at91/dt: sama5d2: add watchdog node (diff)
downloadlinux-bdf9a4d3037fede143fc4b732debc77e9376dc58.tar.xz
linux-bdf9a4d3037fede143fc4b732debc77e9376dc58.zip
ARM: at91/dt: sama5d4 master clock can run at 200MHz now
After the change of frequency a SAMA5D4 can reach, we have to modify the maximum clock specification for the master clock, up to 200MHz now. It avoids the wrong message saying that "master clk is overclocked" for this configuration. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Diffstat (limited to 'arch/arm/boot/dts/sama5d4.dtsi')
-rw-r--r--arch/arm/boot/dts/sama5d4.dtsi2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/sama5d4.dtsi b/arch/arm/boot/dts/sama5d4.dtsi
index 47eaa220de25..8ad54318a111 100644
--- a/arch/arm/boot/dts/sama5d4.dtsi
+++ b/arch/arm/boot/dts/sama5d4.dtsi
@@ -451,7 +451,7 @@
interrupt-parent = <&pmc>;
interrupts = <AT91_PMC_MCKRDY>;
clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>;
- atmel,clk-output-range = <125000000 177000000>;
+ atmel,clk-output-range = <125000000 200000000>;
atmel,clk-divisors = <1 2 4 3>;
};