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authorSteffen Trumtrar <s.trumtrar@pengutronix.de>2016-10-18 09:43:02 +0200
committerDinh Nguyen <dinguyen@opensource.altera.com>2016-10-19 05:18:13 +0200
commitc6deff00b90496d5453d471277a8b469dc3e150d (patch)
tree4386fb3f31c6f8ecbedb2944a561fe42b1b9a90f /arch/arm/boot/dts/socfpga.dtsi
parentARM: dts: socfpga: Add LED framework to A10-SR GPIO (diff)
downloadlinux-c6deff00b90496d5453d471277a8b469dc3e150d.tar.xz
linux-c6deff00b90496d5453d471277a8b469dc3e150d.zip
ARM: dts: socfpga: add qspi node
Add the qspi node to the socfpga dtsi file. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Diffstat (limited to 'arch/arm/boot/dts/socfpga.dtsi')
-rw-r--r--arch/arm/boot/dts/socfpga.dtsi14
1 files changed, 14 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi
index 28ff6e4cd54e..dda6b4500b9a 100644
--- a/arch/arm/boot/dts/socfpga.dtsi
+++ b/arch/arm/boot/dts/socfpga.dtsi
@@ -706,6 +706,20 @@
reg = <0xffff0000 0x10000>;
};
+ qspi: spi@ff705000 {
+ compatible = "cdns,qspi-nor";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0xff705000 0x1000>,
+ <0xffa00000 0x1000>;
+ interrupts = <0 151 4>;
+ cdns,fifo-depth = <128>;
+ cdns,fifo-width = <4>;
+ cdns,trigger-address = <0x00000000>;
+ clocks = <&qspi_clk>;
+ status = "disabled";
+ };
+
rst: rstmgr@ffd05000 {
#reset-cells = <1>;
compatible = "altr,rst-mgr";