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author | Marek Vasut <marex@denx.de> | 2016-11-21 16:23:31 +0100 |
---|---|---|
committer | Dinh Nguyen <dinguyen@kernel.org> | 2016-11-21 16:23:31 +0100 |
commit | 7c38dc624bc49d83d84c185e2ca14adf352c5eaa (patch) | |
tree | ea78eb9023d904e2c180a2b296e7b3ae1d3d4675 /arch/arm/boot/dts/socfpga.dtsi | |
parent | ARM: dts: socfpga: add nand controller nodes (diff) | |
download | linux-7c38dc624bc49d83d84c185e2ca14adf352c5eaa.tar.xz linux-7c38dc624bc49d83d84c185e2ca14adf352c5eaa.zip |
ARM: dts: socfpga: fine-tune L2 cache configuration
Enable double-linefill and increase prefetch offset, which gives
considerable read performance boost. The following numbers were
obtained using lmbench 3.0 bw_mem tool, for easier comparison, the
numbers are pasted in two columns. The test machine has Cyclone V
SoC running at 800MHz MPU clock and 512MiB 333MHz 16bit DDR3 DRAM.
Without patch | With patch
$ for i in rd wr rdwr cp fwr frd fcp bzero bcopy ; do echo $i ; bw_mem 64M $i ; done
rd | rd
64.00 526.46 | 64.00 1151.06
wr | wr
64.00 329.95 | 64.00 346.14
rdwr | rdwr
64.00 342.07 | 64.00 367.24
cp | cp
64.00 239.79 | 64.00 322.47
fwr | fwr
64.00 1027.90 | 64.00 1025.38
frd | frd
64.00 322.36 | 64.00 641.89
fcp | fcp
64.00 256.99 | 64.00 408.41
bzero | bzero
64.00 1028.43 | 64.00 1025.07
bcopy | bcopy
64.00 294.73 | 64.00 357.19
Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Diffstat (limited to 'arch/arm/boot/dts/socfpga.dtsi')
-rw-r--r-- | arch/arm/boot/dts/socfpga.dtsi | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi index 27c1d46127cf..da689659131f 100644 --- a/arch/arm/boot/dts/socfpga.dtsi +++ b/arch/arm/boot/dts/socfpga.dtsi @@ -687,6 +687,11 @@ prefetch-data = <1>; prefetch-instr = <1>; arm,shared-override; + arm,double-linefill = <1>; + arm,double-linefill-incr = <0>; + arm,double-linefill-wrap = <1>; + arm,prefetch-drop = <0>; + arm,prefetch-offset = <7>; }; mmc: dwmmc0@ff704000 { |