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authorThor Thayer <tthayer@opensource.altera.com>2014-10-21 20:55:40 +0200
committerDinh Nguyen <dinguyen@opensource.altera.com>2014-11-21 06:08:36 +0100
commitba6b96b3e915e884003aab7031f11e29c4adb6a0 (patch)
tree988c4283fed03d3b615f7a514dee60c428ebb5e2 /arch/arm/boot/dts/socfpga.dtsi
parentarm: dts: socfpga: Add OCRAM node (diff)
downloadlinux-ba6b96b3e915e884003aab7031f11e29c4adb6a0.tar.xz
linux-ba6b96b3e915e884003aab7031f11e29c4adb6a0.zip
arm: dts: socfpga: Add SPI nodes to SOCFPGA DT.
Add 2 SPI nodes to SOCFPGA device tree. Signed-off-by: Thor Thayer <tthayer@opensource.altera.com> Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Diffstat (limited to 'arch/arm/boot/dts/socfpga.dtsi')
-rw-r--r--arch/arm/boot/dts/socfpga.dtsi22
1 files changed, 22 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi
index 6af96edb0372..deb0a0d815a6 100644
--- a/arch/arm/boot/dts/socfpga.dtsi
+++ b/arch/arm/boot/dts/socfpga.dtsi
@@ -644,6 +644,28 @@
reg = <0xffff0000 0x10000>;
};
+ spi0: spi@fff00000 {
+ compatible = "snps,dw-apb-ssi";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0xfff00000 0x1000>;
+ interrupts = <0 154 4>;
+ num-cs = <4>;
+ clocks = <&spi_m_clk>;
+ status = "disabled";
+ };
+
+ spi1: spi@fff01000 {
+ compatible = "snps,dw-apb-ssi";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0xfff01000 0x1000>;
+ interrupts = <0 156 4>;
+ num-cs = <4>;
+ clocks = <&spi_m_clk>;
+ status = "disabled";
+ };
+
/* Local timer */
timer@fffec600 {
compatible = "arm,cortex-a9-twd-timer";