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author | Dinh Nguyen <dinguyen@opensource.altera.com> | 2014-09-04 23:45:56 +0200 |
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committer | Dinh Nguyen <dinguyen@opensource.altera.com> | 2014-11-21 06:08:42 +0100 |
commit | 475dc86d08de4af61b6e8524bbcdbf8d675cb4fa (patch) | |
tree | 499b98442fdd1c59461e1d10f057f2836fa25ba8 /arch/arm/boot/dts/socfpga.dtsi | |
parent | arm: dts: socfpga: enable watchdog for socfpga platform (diff) | |
download | linux-475dc86d08de4af61b6e8524bbcdbf8d675cb4fa.tar.xz linux-475dc86d08de4af61b6e8524bbcdbf8d675cb4fa.zip |
arm: dts: socfpga: Add a base DTSI for Altera's Arria10 SOC
The Arria 10 is latest SOC+FPGA from the Altera SOCFPGA platform. The Arria10
SOC shares some similarities with the SOCFPGA Cyclone5 and Arria5, but there
are enough differences to warrant a new base dtsi.
The differences are:
* 3 EMAC controllers
* 5 I2C controllers
* 3 SPI controllers
* 1.5 GHZ dual A9s
* Support for DDR4
Besides the usual memory map and IRQ changes, the clock framework will be
different, so this patch just adds the fixed-clocks.
Signed-off-by: Thor Thayer <tthayer@opensource.altera.com>
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Diffstat (limited to 'arch/arm/boot/dts/socfpga.dtsi')
0 files changed, 0 insertions, 0 deletions