summaryrefslogtreecommitdiffstats
path: root/arch/arm/boot/dts/ste-hrefprev60.dtsi
diff options
context:
space:
mode:
authorLinus Walleij <linus.walleij@linaro.org>2014-09-29 17:21:56 +0200
committerLinus Walleij <linus.walleij@linaro.org>2014-10-20 09:08:26 +0200
commit68d41f23ce8d049d05bdd96889d3a2504e7f21f0 (patch)
tree1ec20ed4c44e02306d947f1050f356904d01bff0 /arch/arm/boot/dts/ste-hrefprev60.dtsi
parentLinux 3.18-rc1 (diff)
downloadlinux-68d41f23ce8d049d05bdd96889d3a2504e7f21f0.tar.xz
linux-68d41f23ce8d049d05bdd96889d3a2504e7f21f0.zip
pinctrl: nomadik: force-convert to generic mux bindings
This converts the Nomadik pin controller and all associated device trees to use the standard, generic mux bindings for pin controllers. There are no such device trees deployed in the wild so this is safe to do to set a good example. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'arch/arm/boot/dts/ste-hrefprev60.dtsi')
-rw-r--r--arch/arm/boot/dts/ste-hrefprev60.dtsi12
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/arm/boot/dts/ste-hrefprev60.dtsi b/arch/arm/boot/dts/ste-hrefprev60.dtsi
index abc762e24fcb..5d8b7f8ced1b 100644
--- a/arch/arm/boot/dts/ste-hrefprev60.dtsi
+++ b/arch/arm/boot/dts/ste-hrefprev60.dtsi
@@ -79,8 +79,8 @@
ssp0 {
ssp0_hrefprev60_mode: ssp0_hrefprev60_default {
hrefprev60_mux {
- ste,function = "ssp0";
- ste,pins = "ssp0_a_1";
+ function = "ssp0";
+ groups = "ssp0_a_1";
};
hrefprev60_cfg1 {
ste,pins = "GPIO145_C13"; /* RXD */
@@ -93,8 +93,8 @@
/* This additional pin needed on early MOP500 and HREFs previous to v60 */
sdi0_default_mode: sdi0_default {
hrefprev60_mux {
- ste,function = "mc0";
- ste,pins = "mc0dat31dir_a_1";
+ function = "mc0";
+ groups = "mc0dat31dir_a_1";
};
hrefprev60_cfg1 {
ste,pins = "GPIO21_AB3"; /* DAT31DIR */
@@ -114,8 +114,8 @@
ipgpio {
ipgpio_hrefprev60_mode: ipgpio_hrefprev60 {
hrefprev60_mux {
- ste,function = "ipgpio";
- ste,pins = "ipgpio0_c_1", "ipgpio1_c_1";
+ function = "ipgpio";
+ groups = "ipgpio0_c_1", "ipgpio1_c_1";
};
hrefprev60_cfg1 {
ste,pins = "GPIO6_AF6", "GPIO7_AG5";