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| author | Patrice Chotard <patrice.chotard@st.com> | 2017-01-12 11:59:01 +0100 |
|---|---|---|
| committer | Patrice Chotard <patrice.chotard@st.com> | 2017-01-12 17:23:30 +0100 |
| commit | 04f0d55f905011ad94aa3079ec9ab74a6e083e58 (patch) | |
| tree | ff6c12db9656a7e74f6c9ea9b3fae0e167e7588e /arch/arm/boot/dts/stih407-family.dtsi | |
| parent | ARM: dts: STiH410-family: fix wrong parent clock frequency (diff) | |
| download | linux-04f0d55f905011ad94aa3079ec9ab74a6e083e58.tar.xz linux-04f0d55f905011ad94aa3079ec9ab74a6e083e58.zip | |
ARM: dts: STiH407-family: update gp0_reserved memory region
Update the start address of gp0_reserved memory region
and enable it
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Diffstat (limited to 'arch/arm/boot/dts/stih407-family.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/stih407-family.dtsi | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/arch/arm/boot/dts/stih407-family.dtsi b/arch/arm/boot/dts/stih407-family.dtsi index c0b8fe1d4621..790a252d3e24 100644 --- a/arch/arm/boot/dts/stih407-family.dtsi +++ b/arch/arm/boot/dts/stih407-family.dtsi @@ -20,11 +20,10 @@ #size-cells = <1>; ranges; - gp0_reserved: rproc@40000000 { + gp0_reserved: rproc@45000000 { compatible = "shared-dma-pool"; - reg = <0x40000000 0x01000000>; + reg = <0x45000000 0x00400000>; no-map; - status = "disabled"; }; gp1_reserved: rproc@41000000 { |