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| author | Peter Griffin <peter.griffin@linaro.org> | 2015-09-28 14:37:00 +0200 |
|---|---|---|
| committer | Maxime Coquelin <maxime.coquelin@st.com> | 2015-09-30 10:04:37 +0200 |
| commit | 0e60262814da699ccc6cb5e1880da88ed25c28fe (patch) | |
| tree | abeacc23693645d44ee5d253c14036960c8f3768 /arch/arm/boot/dts/stih407-pinctrl.dtsi | |
| parent | ARM: DT: STiH407: Add NAND flash controller pin configuration (diff) | |
| download | linux-0e60262814da699ccc6cb5e1880da88ed25c28fe.tar.xz linux-0e60262814da699ccc6cb5e1880da88ed25c28fe.zip | |
ARM: DT: STiH407: Add systrace pin configuration
This patch adds the pin config for systrace for
STiH407 family silicon.
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Acked-by: Lee Jones <lee.jones@linaro.org>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
Diffstat (limited to 'arch/arm/boot/dts/stih407-pinctrl.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/stih407-pinctrl.dtsi | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/stih407-pinctrl.dtsi b/arch/arm/boot/dts/stih407-pinctrl.dtsi index d281f9cfc83f..7a1bd428898e 100644 --- a/arch/arm/boot/dts/stih407-pinctrl.dtsi +++ b/arch/arm/boot/dts/stih407-pinctrl.dtsi @@ -846,6 +846,18 @@ }; }; }; + + systrace { + pinctrl_systrace_default: systrace-default { + st,pins { + trc_data0 = <&pio11 3 ALT5 OUT>; + trc_data1 = <&pio11 4 ALT5 OUT>; + trc_data2 = <&pio11 5 ALT5 OUT>; + trc_data3 = <&pio11 6 ALT5 OUT>; + trc_clk = <&pio11 7 ALT5 OUT>; + }; + }; + }; }; pin-controller-front1 { |