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| author | Maxime COQUELIN <maxime.coquelin@st.com> | 2013-11-06 09:25:14 +0100 |
|---|---|---|
| committer | Srinivas Kandagatla <srinivas.kandagatla@st.com> | 2013-12-04 10:00:18 +0100 |
| commit | 5bbb75273f3f26392d82acdfc2cde8c34f51033b (patch) | |
| tree | 656b0a253d31aba56ec95dd8d53236be2b6bac41 /arch/arm/boot/dts/stih415.dtsi | |
| parent | ARM: STi: Supply I2C configuration to STiH416 SoC (diff) | |
| download | linux-5bbb75273f3f26392d82acdfc2cde8c34f51033b.tar.xz linux-5bbb75273f3f26392d82acdfc2cde8c34f51033b.zip | |
ARM: STi: Supply I2C configuration to STiH415 SoC
This patch supplies I2C configuration to STiH415 SoC.
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
Acked-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
Diffstat (limited to 'arch/arm/boot/dts/stih415.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/stih415.dtsi | 53 |
1 files changed, 53 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/stih415.dtsi b/arch/arm/boot/dts/stih415.dtsi index 74ab8ded4b49..d9c7dd1d95a4 100644 --- a/arch/arm/boot/dts/stih415.dtsi +++ b/arch/arm/boot/dts/stih415.dtsi @@ -9,6 +9,7 @@ #include "stih41x.dtsi" #include "stih415-clock.dtsi" #include "stih415-pinctrl.dtsi" +#include <dt-bindings/interrupt-controller/arm-gic.h> / { L2: cache-controller { @@ -83,5 +84,57 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_sbc_serial1>; }; + + i2c@fed40000 { + compatible = "st,comms-ssc4-i2c"; + reg = <0xfed40000 0x110>; + interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&CLKS_ICN_REG_0>; + clock-names = "ssc"; + clock-frequency = <400000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c0_default>; + + status = "disabled"; + }; + + i2c@fed41000 { + compatible = "st,comms-ssc4-i2c"; + reg = <0xfed41000 0x110>; + interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&CLKS_ICN_REG_0>; + clock-names = "ssc"; + clock-frequency = <400000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c1_default>; + + status = "disabled"; + }; + + i2c@fe540000 { + compatible = "st,comms-ssc4-i2c"; + reg = <0xfe540000 0x110>; + interrupts = <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&CLK_SYSIN>; + clock-names = "ssc"; + clock-frequency = <400000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_sbc_i2c0_default>; + + status = "disabled"; + }; + + i2c@fe541000 { + compatible = "st,comms-ssc4-i2c"; + reg = <0xfe541000 0x110>; + interrupts = <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&CLK_SYSIN>; + clock-names = "ssc"; + clock-frequency = <400000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_sbc_i2c1_default>; + + status = "disabled"; + }; }; }; |