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authorPatrick Delaunay <patrick.delaunay@st.com>2020-10-22 19:38:51 +0200
committerAlexandre Torgue <alexandre.torgue@foss.st.com>2020-11-26 14:42:41 +0100
commitdc37a51b258c13bf9dc8f34c5772cb45b93d35ae (patch)
tree327bc813c3963404b624f40c04a046344c82bd4c /arch/arm/boot/dts/stm32mp15-pinctrl.dtsi
parentARM: dts: stm32: set bus-type in DCMI endpoint for stm32429i-eval board (diff)
downloadlinux-dc37a51b258c13bf9dc8f34c5772cb45b93d35ae.tar.xz
linux-dc37a51b258c13bf9dc8f34c5772cb45b93d35ae.zip
ARM: dts: stm32: reorder spi4 within stm32mp15-pinctrl
Move spi4 at the right alphabetical place within stm32mp15-pinctrl Fixes: 4fe663890ac5 ("ARM: dts: stm32: Fix spi4 pins in stm32mp15-pinctrl") Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Diffstat (limited to 'arch/arm/boot/dts/stm32mp15-pinctrl.dtsi')
-rw-r--r--arch/arm/boot/dts/stm32mp15-pinctrl.dtsi28
1 files changed, 14 insertions, 14 deletions
diff --git a/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi b/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi
index 9dbefa77b03e..e595e103bcbd 100644
--- a/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi
+++ b/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi
@@ -1646,6 +1646,20 @@
};
};
+ spi4_pins_a: spi4-0 {
+ pins {
+ pinmux = <STM32_PINMUX('E', 12, AF5)>, /* SPI4_SCK */
+ <STM32_PINMUX('E', 6, AF5)>; /* SPI4_MOSI */
+ bias-disable;
+ drive-push-pull;
+ slew-rate = <1>;
+ };
+ pins2 {
+ pinmux = <STM32_PINMUX('E', 13, AF5)>; /* SPI4_MISO */
+ bias-disable;
+ };
+ };
+
uart4_pins_a: uart4-0 {
pins1 {
pinmux = <STM32_PINMUX('G', 11, AF6)>; /* UART4_TX */
@@ -1781,20 +1795,6 @@
};
};
- spi4_pins_a: spi4-0 {
- pins {
- pinmux = <STM32_PINMUX('E', 12, AF5)>, /* SPI4_SCK */
- <STM32_PINMUX('E', 6, AF5)>; /* SPI4_MOSI */
- bias-disable;
- drive-push-pull;
- slew-rate = <1>;
- };
- pins2 {
- pinmux = <STM32_PINMUX('E', 13, AF5)>; /* SPI4_MISO */
- bias-disable;
- };
- };
-
usart2_pins_a: usart2-0 {
pins1 {
pinmux = <STM32_PINMUX('F', 5, AF7)>, /* USART2_TX */