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| author | Marek Vasut <marex@denx.de> | 2021-03-25 22:45:33 +0100 |
|---|---|---|
| committer | Alexandre Torgue <alexandre.torgue@foss.st.com> | 2021-04-01 11:30:01 +0200 |
| commit | 1305a42b1081389d3a10e2639eafa7594ad65e66 (patch) | |
| tree | a10236fc631a2d7738c583cb9cc2f5cafc2019f9 /arch/arm/boot/dts/stm32mp15xx-dhcom-som.dtsi | |
| parent | ARM: dts: stm32: Update GPIO line names on PicoITX (diff) | |
| download | linux-1305a42b1081389d3a10e2639eafa7594ad65e66.tar.xz linux-1305a42b1081389d3a10e2639eafa7594ad65e66.zip | |
ARM: dts: stm32: Enable crc1 and cryp1 where applicable on DHSOM
Enable the CRC accelerator on all STM32MP15xx DHSOM based systems
and CRYP accelerator on all STM32MP15x[CF] DHSOM based systems.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Diffstat (limited to 'arch/arm/boot/dts/stm32mp15xx-dhcom-som.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/stm32mp15xx-dhcom-som.dtsi | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/stm32mp15xx-dhcom-som.dtsi b/arch/arm/boot/dts/stm32mp15xx-dhcom-som.dtsi index d40c8db74c6f..272a1a67a9ad 100644 --- a/arch/arm/boot/dts/stm32mp15xx-dhcom-som.dtsi +++ b/arch/arm/boot/dts/stm32mp15xx-dhcom-som.dtsi @@ -92,6 +92,10 @@ }; }; +&crc1 { + status = "okay"; +}; + &dac { pinctrl-names = "default"; pinctrl-0 = <&dac_ch1_pins_a &dac_ch2_pins_a>; |