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authorMaxime Ripard <maxime.ripard@free-electrons.com>2013-12-29 22:31:53 +0100
committerMaxime Ripard <maxime.ripard@free-electrons.com>2013-12-29 22:31:53 +0100
commit2c6b473bfabdca1be95612543d7b31376df30caa (patch)
treed982eea37271c51d519baa12aa53148fe166b16a /arch/arm/boot/dts/sun4i-a10-cubieboard.dts
parentARM: sun6i: dt: Add IP needed to bring up the additional cores (diff)
parentARM: sunxi: dt: add nodes for the mbus clock (diff)
downloadlinux-2c6b473bfabdca1be95612543d7b31376df30caa.tar.xz
linux-2c6b473bfabdca1be95612543d7b31376df30caa.zip
Merge tag 'sunxi-clk-3.14-for-maxime' of https://bitbucket.org/emiliolopez/linux into sunxi/dt-for-3.14
Allwinner sunXi SoCs DT changes for clocks This contains the DT parts of the "[PATCH v3 00/13] clk: sunxi: add PLL5 and PLL6 support" series. It adds DT nodes for PLL4/5/6 and mod0 clocks on most sunxi platforms.
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