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author | Marcus Cooper <codekipper@gmail.com> | 2016-03-21 21:01:01 +0100 |
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committer | Maxime Ripard <maxime.ripard@free-electrons.com> | 2016-03-27 16:15:04 +0200 |
commit | 1010cd549974dcee5ee172bd878f989c521c409f (patch) | |
tree | ec1799eff7c87bb74910100196f1dd70e2082ac1 /arch/arm/boot/dts/sun4i-a10.dtsi | |
parent | ARM: dts: sun7i: Add SPDIF TX pin to the A20 (diff) | |
download | linux-1010cd549974dcee5ee172bd878f989c521c409f.tar.xz linux-1010cd549974dcee5ee172bd878f989c521c409f.zip |
ARM: dts: sun4i: Add the SPDIF clk to the A10
Add the SPDIF clock to the A10 dtsi.
Signed-off-by: Marcus Cooper <codekipper@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Diffstat (limited to '')
-rw-r--r-- | arch/arm/boot/dts/sun4i-a10.dtsi | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi index 62fcef9b5eca..57475221b0e1 100644 --- a/arch/arm/boot/dts/sun4i-a10.dtsi +++ b/arch/arm/boot/dts/sun4i-a10.dtsi @@ -477,6 +477,17 @@ clock-output-names = "ir1"; }; + spdif_clk: clk@01c200c0 { + #clock-cells = <0>; + compatible = "allwinner,sun4i-a10-mod1-clk"; + reg = <0x01c200c0 0x4>; + clocks = <&pll2 SUN4I_A10_PLL2_8X>, + <&pll2 SUN4I_A10_PLL2_4X>, + <&pll2 SUN4I_A10_PLL2_2X>, + <&pll2 SUN4I_A10_PLL2_1X>; + clock-output-names = "spdif"; + }; + usb_clk: clk@01c200cc { #clock-cells = <1>; #reset-cells = <1>; |