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authorMaxime Ripard <maxime.ripard@bootlin.com>2018-11-20 22:03:28 +0100
committerMaxime Ripard <maxime.ripard@bootlin.com>2018-11-28 15:14:06 +0100
commit1eb3927c207e94e48db76b70a5238d68a8b7bdb2 (patch)
tree114d81cd3ccb0c0e2d8da96d5f88fe4ad0d480a4 /arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts
parentARM: dts: sun5i: A10s: Remove empty SRAM node (diff)
downloadlinux-1eb3927c207e94e48db76b70a5238d68a8b7bdb2.tar.xz
linux-1eb3927c207e94e48db76b70a5238d68a8b7bdb2.zip
ARM: dts: sun5i: Provide default muxing for relevant controllers
The I2C's, MMC0 and MMC1 controllers have only one muxing option in the SoC. In such a case, we can just move the muxing into the DTSI, and remove it from the DTS. Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> Acked-by: Chen-Yu Tsai <wens@csie.org>
Diffstat (limited to 'arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts')
-rw-r--r--arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts10
1 files changed, 0 insertions, 10 deletions
diff --git a/arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts b/arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts
index ae6d4a0bb9c9..262c2ffbdcfa 100644
--- a/arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts
+++ b/arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts
@@ -117,8 +117,6 @@
};
&i2c0 {
- pinctrl-names = "default";
- pinctrl-0 = <&i2c0_pins>;
status = "okay";
axp152: pmic@30 {
@@ -130,8 +128,6 @@
#include "axp152.dtsi"
&i2c1 {
- pinctrl-names = "default";
- pinctrl-0 = <&i2c1_pins>;
status = "okay";
at24@50 {
@@ -143,8 +139,6 @@
};
&i2c2 {
- pinctrl-names = "default";
- pinctrl-0 = <&i2c2_pins>;
status = "okay";
};
@@ -197,8 +191,6 @@
};
&mmc0 {
- pinctrl-names = "default";
- pinctrl-0 = <&mmc0_pins>;
vmmc-supply = <&reg_vcc3v3>;
bus-width = <4>;
cd-gpios = <&pio 6 1 GPIO_ACTIVE_LOW>; /* PG1 */
@@ -206,8 +198,6 @@
};
&mmc1 {
- pinctrl-names = "default";
- pinctrl-0 = <&mmc1_pins>;
vmmc-supply = <&reg_vcc3v3>;
bus-width = <4>;
cd-gpios = <&pio 6 13 GPIO_ACTIVE_LOW>; /* PG13 */