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| author | Dinh Nguyen <dinguyen@kernel.org> | 2018-07-10 00:16:00 +0200 |
|---|---|---|
| committer | Dinh Nguyen <dinguyen@kernel.org> | 2018-08-30 15:38:26 +0200 |
| commit | 0ffc5df823dd3495441c47ea3ffaa09d4a57a5f1 (patch) | |
| tree | 69b2f5a5295dec4d8057f722e54874a8bd1eadd7 /arch/arm/boot/dts/sun5i-a10s-r7-tv-dongle.dts | |
| parent | ARM: dts: arria10: update NAND clocking (diff) | |
| download | linux-0ffc5df823dd3495441c47ea3ffaa09d4a57a5f1.tar.xz linux-0ffc5df823dd3495441c47ea3ffaa09d4a57a5f1.zip | |
ARM: dts: socfpga: update NAND clocking for c5/a5
The NAND IP needs 3 clocks(nand_x_clk, nand_clk, and nand_ecc_clk). The
nand_x_clk and nand_ecc_clk are derived from the nand_clk. The nand_x_clk
has a fixed divider of 4.
Also, update the NAND dts property with the correct clocks property.
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
---
v2: add nand_ecc_clk and update commit message
Diffstat (limited to 'arch/arm/boot/dts/sun5i-a10s-r7-tv-dongle.dts')
0 files changed, 0 insertions, 0 deletions