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authorMaxime Ripard <maxime.ripard@free-electrons.com>2017-02-03 16:01:27 +0100
committerMaxime Ripard <maxime.ripard@free-electrons.com>2017-03-06 07:40:36 +0100
commit1f4ce3b6ca79bdb0ffbe82990c9b94b5a4a02d66 (patch)
treeb0a9f9f805500c3a2246af0a06ea153ac21de2e3 /arch/arm/boot/dts/sun5i-gr8-chip-pro.dts
parentARM: sun5i: r8: Merge common controllers into the common DTSI (diff)
downloadlinux-1f4ce3b6ca79bdb0ffbe82990c9b94b5a4a02d66.tar.xz
linux-1f4ce3b6ca79bdb0ffbe82990c9b94b5a4a02d66.zip
ARM: sun5i: gr8: Use common sun5i DTSI
Most of the GR8 DTSI is duplicated with the common sun5i DTSI, and some of the extra nodes defined there actually apply to all of the sun5i family. Move those into the common DTSI so that all SoCs can benefit from it, and include the sun5i DTSI. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Diffstat (limited to 'arch/arm/boot/dts/sun5i-gr8-chip-pro.dts')
-rw-r--r--arch/arm/boot/dts/sun5i-gr8-chip-pro.dts4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/sun5i-gr8-chip-pro.dts b/arch/arm/boot/dts/sun5i-gr8-chip-pro.dts
index 0cf0813d363a..c55b11a4d3c7 100644
--- a/arch/arm/boot/dts/sun5i-gr8-chip-pro.dts
+++ b/arch/arm/boot/dts/sun5i-gr8-chip-pro.dts
@@ -171,7 +171,7 @@
&pwm {
pinctrl-names = "default";
- pinctrl-0 = <&pwm0_pins_a>, <&pwm1_pins>;
+ pinctrl-0 = <&pwm0_pins>, <&pwm1_pins>;
status = "disabled";
};
@@ -220,7 +220,7 @@
&uart1 {
pinctrl-names = "default";
- pinctrl-0 = <&uart1_pins_a>, <&uart1_cts_rts_pins_a>;
+ pinctrl-0 = <&uart1_pins_b>, <&uart1_cts_rts_pins_a>;
status = "okay";
};