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| author | Maxime Ripard <maxime.ripard@free-electrons.com> | 2016-10-20 09:01:41 +0200 |
|---|---|---|
| committer | Maxime Ripard <maxime.ripard@free-electrons.com> | 2016-11-22 15:32:10 +0100 |
| commit | 15df8ad971f4f20cdafe3e8651d64c2a1b8aa5ba (patch) | |
| tree | fdf8edf170e440e7859eb1eba06d79937e312045 /arch/arm/boot/dts/sun5i-gr8.dtsi | |
| parent | ARM: gr8: Add UART2 pins (diff) | |
| download | linux-15df8ad971f4f20cdafe3e8651d64c2a1b8aa5ba.tar.xz linux-15df8ad971f4f20cdafe3e8651d64c2a1b8aa5ba.zip | |
ARM: gr8: Add UART3 pins
The UART3 pins were missing from the DTSI. Add them.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Diffstat (limited to 'arch/arm/boot/dts/sun5i-gr8.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/sun5i-gr8.dtsi | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/sun5i-gr8.dtsi b/arch/arm/boot/dts/sun5i-gr8.dtsi index 48e5eea9c3ab..ea86d4d58db6 100644 --- a/arch/arm/boot/dts/sun5i-gr8.dtsi +++ b/arch/arm/boot/dts/sun5i-gr8.dtsi @@ -895,6 +895,20 @@ allwinner,drive = <SUN4I_PINCTRL_10_MA>; allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; }; + + uart3_pins_a: uart3@1 { + allwinner,pins = "PG9", "PG10"; + allwinner,function = "uart3"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; + + uart3_cts_rts_pins_a: uart3-cts-rts@0 { + allwinner,pins = "PG11", "PG12"; + allwinner,function = "uart3"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; }; pwm: pwm@01c20e00 { |