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author | Maxime Ripard <maxime.ripard@free-electrons.com> | 2016-10-14 17:39:10 +0200 |
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committer | Maxime Ripard <maxime.ripard@free-electrons.com> | 2016-11-22 15:33:57 +0100 |
commit | 77df9d66b0b1ad01c685fd6341ce501493899658 (patch) | |
tree | 538ec88fcda660702cbeb8ddf4ccdd44c4a40757 /arch/arm/boot/dts/sun5i-r8-chip.dts | |
parent | ARM: sun5i: Add RGB 565 LCD pins (diff) | |
download | linux-77df9d66b0b1ad01c685fd6341ce501493899658.tar.xz linux-77df9d66b0b1ad01c685fd6341ce501493899658.zip |
ARM: sun5i: chip: Add optional buses
The I2C1 and SPI2 buses are exposed on the CHIP headers, and are not
explicitly dedicated to anything.
Add them to the DTS with the muxing already set, but keep them disabled.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Diffstat (limited to 'arch/arm/boot/dts/sun5i-r8-chip.dts')
-rw-r--r-- | arch/arm/boot/dts/sun5i-r8-chip.dts | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/sun5i-r8-chip.dts b/arch/arm/boot/dts/sun5i-r8-chip.dts index 059d86865b73..c6da5ad37152 100644 --- a/arch/arm/boot/dts/sun5i-r8-chip.dts +++ b/arch/arm/boot/dts/sun5i-r8-chip.dts @@ -56,9 +56,11 @@ aliases { i2c0 = &i2c0; + i2c1 = &i2c1; i2c2 = &i2c2; serial0 = &uart1; serial1 = &uart3; + spi0 = &spi2; }; chosen { @@ -126,6 +128,12 @@ #include "axp209.dtsi" +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins_a>; + status = "disabled"; +}; + &i2c2 { pinctrl-names = "default"; pinctrl-0 = <&i2c2_pins_a>; @@ -257,6 +265,12 @@ status = "okay"; }; +&spi2 { + pinctrl-names = "default"; + pinctrl-0 = <&spi2_pins_a>; + status = "disabled"; +}; + &tcon0 { status = "okay"; }; |