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| author | Maxime Ripard <maxime.ripard@bootlin.com> | 2018-11-20 22:03:28 +0100 |
|---|---|---|
| committer | Maxime Ripard <maxime.ripard@bootlin.com> | 2018-11-28 15:14:06 +0100 |
| commit | 1eb3927c207e94e48db76b70a5238d68a8b7bdb2 (patch) | |
| tree | 114d81cd3ccb0c0e2d8da96d5f88fe4ad0d480a4 /arch/arm/boot/dts/sun5i-r8-chip.dts | |
| parent | ARM: dts: sun5i: A10s: Remove empty SRAM node (diff) | |
| download | linux-1eb3927c207e94e48db76b70a5238d68a8b7bdb2.tar.xz linux-1eb3927c207e94e48db76b70a5238d68a8b7bdb2.zip | |
ARM: dts: sun5i: Provide default muxing for relevant controllers
The I2C's, MMC0 and MMC1 controllers have only one muxing option in the
SoC. In such a case, we can just move the muxing into the DTSI, and remove
it from the DTS.
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Diffstat (limited to 'arch/arm/boot/dts/sun5i-r8-chip.dts')
| -rw-r--r-- | arch/arm/boot/dts/sun5i-r8-chip.dts | 8 |
1 files changed, 0 insertions, 8 deletions
diff --git a/arch/arm/boot/dts/sun5i-r8-chip.dts b/arch/arm/boot/dts/sun5i-r8-chip.dts index 3c9f4f35d43b..f4298facf9dc 100644 --- a/arch/arm/boot/dts/sun5i-r8-chip.dts +++ b/arch/arm/boot/dts/sun5i-r8-chip.dts @@ -107,8 +107,6 @@ }; &i2c0 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c0_pins>; status = "okay"; axp209: pmic@34 { @@ -135,14 +133,10 @@ }; &i2c1 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c1_pins>; status = "disabled"; }; &i2c2 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c2_pins>; status = "okay"; xio: gpio@38 { @@ -164,8 +158,6 @@ }; &mmc0 { - pinctrl-names = "default"; - pinctrl-0 = <&mmc0_pins>; vmmc-supply = <®_vcc3v3>; mmc-pwrseq = <&mmc0_pwrseq>; bus-width = <4>; |