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| author | Maxime Ripard <maxime.ripard@bootlin.com> | 2018-11-07 11:14:15 +0100 |
|---|---|---|
| committer | Maxime Ripard <maxime.ripard@bootlin.com> | 2018-11-28 11:36:43 +0100 |
| commit | f606c4b3b7e942a975db0e3d835dd245473e6dbd (patch) | |
| tree | 9de866410224e2bc02a232f7e60c0f0dc010a8d0 /arch/arm/boot/dts/sun5i-r8-chip.dts | |
| parent | ARM: dts: sun5i: Change LRADC node names to avoid warnings (diff) | |
| download | linux-f606c4b3b7e942a975db0e3d835dd245473e6dbd.tar.xz linux-f606c4b3b7e942a975db0e3d835dd245473e6dbd.zip | |
ARM: dts: sun5i: Remove all useless pinctrl nodes
The gpio pinctrl nodes are redundant and as such useless most of the times.
Since they will also generate warnings in DTC, we can simply remove most of
them.
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Diffstat (limited to 'arch/arm/boot/dts/sun5i-r8-chip.dts')
| -rw-r--r-- | arch/arm/boot/dts/sun5i-r8-chip.dts | 19 |
1 files changed, 0 insertions, 19 deletions
diff --git a/arch/arm/boot/dts/sun5i-r8-chip.dts b/arch/arm/boot/dts/sun5i-r8-chip.dts index 879a4b0f3bd5..c97e46e4bb45 100644 --- a/arch/arm/boot/dts/sun5i-r8-chip.dts +++ b/arch/arm/boot/dts/sun5i-r8-chip.dts @@ -79,8 +79,6 @@ mmc0_pwrseq: mmc0_pwrseq { compatible = "mmc-pwrseq-simple"; - pinctrl-names = "default"; - pinctrl-0 = <&chip_wifi_reg_on_pin>; reset-gpios = <&pio 2 19 GPIO_ACTIVE_LOW>; /* PC19 */ }; @@ -184,20 +182,6 @@ }; &pio { - chip_vbus_pin: chip_vbus_pin@0 { - pins = "PB10"; - function = "gpio_out"; - }; - - chip_wifi_reg_on_pin: chip_wifi_reg_on_pin@0 { - pins = "PC19"; - function = "gpio_out"; - }; - - chip_id_det_pin: chip_id_det_pin@0 { - pins = "PG2"; - function = "gpio_in"; - }; chip_w1_pin: chip_w1_pin@0 { pins = "PD2"; @@ -260,7 +244,6 @@ }; ®_usb0_vbus { - pinctrl-0 = <&chip_vbus_pin>; vin-supply = <®_vcc5v0>; gpio = <&pio 1 10 GPIO_ACTIVE_HIGH>; /* PB10 */ status = "okay"; @@ -303,8 +286,6 @@ }; &usbphy { - pinctrl-names = "default"; - pinctrl-0 = <&chip_id_det_pin>; status = "okay"; usb0_id_det-gpio = <&pio 6 2 GPIO_ACTIVE_HIGH>; /* PG2 */ |