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| author | Maxime Ripard <maxime.ripard@free-electrons.com> | 2017-02-05 17:56:40 +0100 |
|---|---|---|
| committer | Maxime Ripard <maxime.ripard@free-electrons.com> | 2017-03-06 07:40:36 +0100 |
| commit | e6f50b223da10de6bd70b8b9d217bd0c77ae5c13 (patch) | |
| tree | 9ccfde4a1ec87d07da58f50884536f4f85d4ea76 /arch/arm/boot/dts/sun5i.dtsi | |
| parent | ARM: sun5i: Add UART2 pin group (diff) | |
| download | linux-e6f50b223da10de6bd70b8b9d217bd0c77ae5c13.tar.xz linux-e6f50b223da10de6bd70b8b9d217bd0c77ae5c13.zip | |
ARM: sun5i: Rename UART3 flow control pins
The UART3 pin group for the CTS and RTS signals doesn't follow our usual
pattern. Rename it so that it matches.
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Diffstat (limited to '')
| -rw-r--r-- | arch/arm/boot/dts/sun5i.dtsi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/sun5i.dtsi b/arch/arm/boot/dts/sun5i.dtsi index 83da6366d062..64e780549ecd 100644 --- a/arch/arm/boot/dts/sun5i.dtsi +++ b/arch/arm/boot/dts/sun5i.dtsi @@ -346,7 +346,7 @@ function = "uart3"; }; - uart3_pins_cts_rts_a: uart3-cts-rts@0 { + uart3_cts_rts_pins_a: uart3-cts-rts@0 { pins = "PG11", "PG12"; function = "uart3"; }; |