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author | Maxime Ripard <maxime.ripard@free-electrons.com> | 2016-07-18 20:51:30 +0200 |
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committer | Maxime Ripard <maxime.ripard@free-electrons.com> | 2016-11-22 15:33:56 +0100 |
commit | 9255fb6c7e0c7069832811e81f90e18a1f124500 (patch) | |
tree | 1362d1dfe1b0150bf9da103537b91449f3084414 /arch/arm/boot/dts/sun5i.dtsi | |
parent | ARM: sun5i: Rename A10s pins (diff) | |
download | linux-9255fb6c7e0c7069832811e81f90e18a1f124500.tar.xz linux-9255fb6c7e0c7069832811e81f90e18a1f124500.zip |
ARM: sun5i: Add SPI2 pins
All the sun5i have the SPI2 pins exposed on the PE bank. Add them to the
DT.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Diffstat (limited to 'arch/arm/boot/dts/sun5i.dtsi')
-rw-r--r-- | arch/arm/boot/dts/sun5i.dtsi | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/sun5i.dtsi b/arch/arm/boot/dts/sun5i.dtsi index e374f4fc8073..245cee14cf1d 100644 --- a/arch/arm/boot/dts/sun5i.dtsi +++ b/arch/arm/boot/dts/sun5i.dtsi @@ -591,6 +591,20 @@ allwinner,pull = <SUN4I_PINCTRL_PULL_UP>; }; + spi2_pins_a: spi2@0 { + allwinner,pins = "PE1", "PE2", "PE3"; + allwinner,function = "spi2"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; + + spi2_cs0_pins_a: spi2-cs0@0 { + allwinner,pins = "PE0"; + allwinner,function = "spi2"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; + uart3_pins_a: uart3@0 { allwinner,pins = "PG9", "PG10"; allwinner,function = "uart3"; |