diff options
author | Maxime Ripard <maxime.ripard@bootlin.com> | 2018-11-20 22:03:28 +0100 |
---|---|---|
committer | Maxime Ripard <maxime.ripard@bootlin.com> | 2018-11-28 15:14:10 +0100 |
commit | 1f8bed29730273540be248fa45db6410d63c3a69 (patch) | |
tree | 0c74162f42b46009040d0159f6b289d8683ae5a2 /arch/arm/boot/dts/sun6i-a31.dtsi | |
parent | ARM: dts: sun6i: colombus: Change i2c node name to avoid warnings (diff) | |
download | linux-1f8bed29730273540be248fa45db6410d63c3a69.tar.xz linux-1f8bed29730273540be248fa45db6410d63c3a69.zip |
ARM: dts: sun6i: Provide default muxing for relevant controllers
The I2C and MMC controllers have only one muxing option in the SoC. In such a
case, we can just move the muxing into the DTSI, and remove it from
the DTS.
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Diffstat (limited to 'arch/arm/boot/dts/sun6i-a31.dtsi')
-rw-r--r-- | arch/arm/boot/dts/sun6i-a31.dtsi | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi index cd095fb369e5..2ca4f255adbe 100644 --- a/arch/arm/boot/dts/sun6i-a31.dtsi +++ b/arch/arm/boot/dts/sun6i-a31.dtsi @@ -388,6 +388,8 @@ resets = <&ccu RST_AHB1_MMC0>; reset-names = "ahb"; interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins>; status = "disabled"; #address-cells = <1>; #size-cells = <0>; @@ -407,6 +409,8 @@ resets = <&ccu RST_AHB1_MMC1>; reset-names = "ahb"; interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&mmc1_pins>; status = "disabled"; #address-cells = <1>; #size-cells = <0>; @@ -878,6 +882,8 @@ interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; clocks = <&ccu CLK_APB2_I2C0>; resets = <&ccu RST_APB2_I2C0>; + pinctrl-names = "default"; + pinctrl-0 = <&i2c0_pins>; status = "disabled"; #address-cells = <1>; #size-cells = <0>; @@ -889,6 +895,8 @@ interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; clocks = <&ccu CLK_APB2_I2C1>; resets = <&ccu RST_APB2_I2C1>; + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins>; status = "disabled"; #address-cells = <1>; #size-cells = <0>; @@ -900,6 +908,8 @@ interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; clocks = <&ccu CLK_APB2_I2C2>; resets = <&ccu RST_APB2_I2C2>; + pinctrl-names = "default"; + pinctrl-0 = <&i2c2_pins>; status = "disabled"; #address-cells = <1>; #size-cells = <0>; |