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| author | Maxime Ripard <maxime.ripard@free-electrons.com> | 2013-03-12 22:16:05 +0100 |
|---|---|---|
| committer | Maxime Ripard <maxime.ripard@free-electrons.com> | 2013-08-22 00:19:16 +0200 |
| commit | 140e1721d108227cc3129c12dca1c5f8ccc7fb39 (patch) | |
| tree | 6cbe4177eee49e5920af41146278671de51f1554 /arch/arm/boot/dts/sun6i-a31.dtsi | |
| parent | ARM: sun7i: Add Olimex A20-Olinuxino-Micro support (diff) | |
| download | linux-140e1721d108227cc3129c12dca1c5f8ccc7fb39.tar.xz linux-140e1721d108227cc3129c12dca1c5f8ccc7fb39.zip | |
ARM: sunxi: dt: Add PIO controller to A31 DTSI
The A31 has a different set of pins than the one found on the A10 and
A13. Now that we have support for the A31 pin set in the pinctrl driver,
we can enable it in the DTSI with its own compatible.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Diffstat (limited to 'arch/arm/boot/dts/sun6i-a31.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/sun6i-a31.dtsi | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi index 4d076ec24885..902b1e672455 100644 --- a/arch/arm/boot/dts/sun6i-a31.dtsi +++ b/arch/arm/boot/dts/sun6i-a31.dtsi @@ -66,6 +66,18 @@ #size-cells = <1>; ranges; + pio: pinctrl@01c20800 { + compatible = "allwinner,sun6i-a31-pinctrl"; + reg = <0x01c20800 0x400>; + interrupts = <0 11 1>, <0 15 1>, <0 16 1>, <0 17 1>; + clocks = <&osc>; + gpio-controller; + interrupt-controller; + #address-cells = <1>; + #size-cells = <0>; + #gpio-cells = <3>; + }; + timer@01c20c00 { compatible = "allwinner,sun4i-timer"; reg = <0x01c20c00 0xa0>; |