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| author | Emilio López <emilio@elopez.com.ar> | 2013-12-23 04:32:38 +0100 |
|---|---|---|
| committer | Emilio López <emilio@elopez.com.ar> | 2013-12-28 21:28:23 +0100 |
| commit | c3e5e66b65a57df8025cbf59801d9c357cf807ea (patch) | |
| tree | 7c9310308b86b8f87050538768b9a0a060029a5c /arch/arm/boot/dts/sun7i-a20.dtsi | |
| parent | ARM: sunxi: add PLL4 support (diff) | |
| download | linux-c3e5e66b65a57df8025cbf59801d9c357cf807ea.tar.xz linux-c3e5e66b65a57df8025cbf59801d9c357cf807ea.zip | |
ARM: sunxi: add PLL5 and PLL6 support
This commit adds PLL5 and PLL6 nodes to the sun4i, sun5i and sun7i
device trees.
Signed-off-by: Emilio López <emilio@elopez.com.ar>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Diffstat (limited to 'arch/arm/boot/dts/sun7i-a20.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/sun7i-a20.dtsi | 28 |
1 files changed, 16 insertions, 12 deletions
diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi index e4a5d37a12f8..a6cd039d5a0c 100644 --- a/arch/arm/boot/dts/sun7i-a20.dtsi +++ b/arch/arm/boot/dts/sun7i-a20.dtsi @@ -69,23 +69,27 @@ clocks = <&osc24M>; }; - /* - * This is a dummy clock, to be used as placeholder on - * other mux clocks when a specific parent clock is not - * yet implemented. It should be dropped when the driver - * is complete. - */ - pll6: pll6 { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <0>; + pll5: pll5@01c20020 { + #clock-cells = <1>; + compatible = "allwinner,sun4i-pll5-clk"; + reg = <0x01c20020 0x4>; + clocks = <&osc24M>; + clock-output-names = "pll5_ddr", "pll5_other"; + }; + + pll6: pll6@01c20028 { + #clock-cells = <1>; + compatible = "allwinner,sun4i-pll6-clk"; + reg = <0x01c20028 0x4>; + clocks = <&osc24M>; + clock-output-names = "pll6_sata", "pll6_other", "pll6"; }; cpu: cpu@01c20054 { #clock-cells = <0>; compatible = "allwinner,sun4i-cpu-clk"; reg = <0x01c20054 0x4>; - clocks = <&osc32k>, <&osc24M>, <&pll1>, <&pll6>; + clocks = <&osc32k>, <&osc24M>, <&pll1>, <&pll6 1>; }; axi: axi@01c20054 { @@ -144,7 +148,7 @@ #clock-cells = <0>; compatible = "allwinner,sun4i-apb1-mux-clk"; reg = <0x01c20058 0x4>; - clocks = <&osc24M>, <&pll6>, <&osc32k>; + clocks = <&osc24M>, <&pll6 1>, <&osc32k>; }; apb1: apb1@01c20058 { |