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authorMaxime Ripard <maxime.ripard@bootlin.com>2019-04-01 23:13:55 +0200
committerMaxime Ripard <maxime.ripard@bootlin.com>2019-04-02 13:11:07 +0200
commitc9d10c3e0e6ccdecf1a2a1e618a04c3d1c4f87e7 (patch)
tree5ee206a571b856c2140f1402c8d10561c75a0e5f /arch/arm/boot/dts/sun7i-a20.dtsi
parentARM: dts: sun8i: a83t: Add missing CPU clock references (diff)
downloadlinux-c9d10c3e0e6ccdecf1a2a1e618a04c3d1c4f87e7.tar.xz
linux-c9d10c3e0e6ccdecf1a2a1e618a04c3d1c4f87e7.zip
ARM: dts: sunxi: Conform to DT spec for NAND controller
The NAND controller node name should be nand-controller and not nand as we used previously according to the devicetree specification. Let's fix our DTs. Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Diffstat (limited to 'arch/arm/boot/dts/sun7i-a20.dtsi')
-rw-r--r--arch/arm/boot/dts/sun7i-a20.dtsi2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
index 28e1045853fc..794c915f504b 100644
--- a/arch/arm/boot/dts/sun7i-a20.dtsi
+++ b/arch/arm/boot/dts/sun7i-a20.dtsi
@@ -333,7 +333,7 @@
#dma-cells = <2>;
};
- nfc: nand@1c03000 {
+ nfc: nand-controller@1c03000 {
compatible = "allwinner,sun4i-a10-nand";
reg = <0x01c03000 0x1000>;
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;