diff options
| author | Maxime Ripard <maxime@cerno.tech> | 2021-09-01 11:18:41 +0200 |
|---|---|---|
| committer | Maxime Ripard <maxime@cerno.tech> | 2021-09-13 09:04:30 +0200 |
| commit | 4e0d439dbbf73912ba1dc110a6b564e80dd9f320 (patch) | |
| tree | c2bda0d27e9609c32b197f04c75a96e3fd68051d /arch/arm/boot/dts/sun7i-a20.dtsi | |
| parent | ARM: dts: sunxi: Rename gpio pinctrl names (diff) | |
| download | linux-4e0d439dbbf73912ba1dc110a6b564e80dd9f320.tar.xz linux-4e0d439dbbf73912ba1dc110a6b564e80dd9f320.zip | |
ARM: dts: sunxi: Fix OPP arrays
Even though it translates to the same thing down to the binary level, we
should have an array of 2 number cells to describe each OPP, which in
turns create a validation warning.
Let's fix this.
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Link: https://lore.kernel.org/r/20210901091852.479202-42-maxime@cerno.tech
Diffstat (limited to 'arch/arm/boot/dts/sun7i-a20.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/sun7i-a20.dtsi | 34 |
1 files changed, 16 insertions, 18 deletions
diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi index 5a40e0280665..5574299685ab 100644 --- a/arch/arm/boot/dts/sun7i-a20.dtsi +++ b/arch/arm/boot/dts/sun7i-a20.dtsi @@ -106,16 +106,15 @@ reg = <0>; clocks = <&ccu CLK_CPU>; clock-latency = <244144>; /* 8 32k periods */ - operating-points = < + operating-points = /* kHz uV */ - 960000 1400000 - 912000 1400000 - 864000 1300000 - 720000 1200000 - 528000 1100000 - 312000 1000000 - 144000 1000000 - >; + <960000 1400000>, + <912000 1400000>, + <864000 1300000>, + <720000 1200000>, + <528000 1100000>, + <312000 1000000>, + <144000 1000000>; #cooling-cells = <2>; }; @@ -125,16 +124,15 @@ reg = <1>; clocks = <&ccu CLK_CPU>; clock-latency = <244144>; /* 8 32k periods */ - operating-points = < + operating-points = /* kHz uV */ - 960000 1400000 - 912000 1400000 - 864000 1300000 - 720000 1200000 - 528000 1100000 - 312000 1000000 - 144000 1000000 - >; + <960000 1400000>, + <912000 1400000>, + <864000 1300000>, + <720000 1200000>, + <528000 1100000>, + <312000 1000000>, + <144000 1000000>; #cooling-cells = <2>; }; }; |