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author | Roman Beranek <me@crly.cz> | 2023-05-05 07:21:08 +0200 |
---|---|---|
committer | Jernej Skrabec <jernej.skrabec@gmail.com> | 2023-05-18 23:08:23 +0200 |
commit | ec4c54584c504f98c77073c6795936e96f278a15 (patch) | |
tree | a25145f3bc0b8ac931ab056204a7249769e52d15 /arch/arm/boot/dts/sun8i-a83t.dtsi | |
parent | Linux 6.4-rc1 (diff) | |
download | linux-ec4c54584c504f98c77073c6795936e96f278a15.tar.xz linux-ec4c54584c504f98c77073c6795936e96f278a15.zip |
ARM: dts: sunxi: rename tcon's clock output
While the rate of TCON0's DCLK matches dotclock for parallel and LVDS
outputs, this doesn't hold for DSI. According manuals from Allwinner,
DCLK is an abbreviation of Data Clock, not dotclock, so go with that
instead.
Signed-off-by: Roman Beranek <me@crly.cz>
Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Acked-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20230505052110.67514-3-me@crly.cz
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Diffstat (limited to 'arch/arm/boot/dts/sun8i-a83t.dtsi')
-rw-r--r-- | arch/arm/boot/dts/sun8i-a83t.dtsi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi index 82fdb04122ca..94eb3bfc989e 100644 --- a/arch/arm/boot/dts/sun8i-a83t.dtsi +++ b/arch/arm/boot/dts/sun8i-a83t.dtsi @@ -456,7 +456,7 @@ interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; clocks = <&ccu CLK_BUS_TCON0>, <&ccu CLK_TCON0>; clock-names = "ahb", "tcon-ch0"; - clock-output-names = "tcon-pixel-clock"; + clock-output-names = "tcon-data-clock"; #clock-cells = <0>; resets = <&ccu RST_BUS_TCON0>, <&ccu RST_BUS_LVDS>; reset-names = "lcd", "lvds"; |