diff options
author | Corentin Labbe <clabbe.montjoie@gmail.com> | 2017-10-31 09:19:12 +0100 |
---|---|---|
committer | Maxime Ripard <maxime.ripard@free-electrons.com> | 2017-11-02 09:02:13 +0100 |
commit | 4904337fe34fa7fc529d6f4d9ee8b96fe7db310a (patch) | |
tree | e80a123e7e08ef138c03d37590d7e6fe3fafcd55 /arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts | |
parent | ARM: dts: sunxi: h3/h5: represent the mdio switch used by sun8i-h3-emac (diff) | |
download | linux-4904337fe34fa7fc529d6f4d9ee8b96fe7db310a.tar.xz linux-4904337fe34fa7fc529d6f4d9ee8b96fe7db310a.zip |
ARM: dts: sunxi: Restore EMAC changes (boards)
The original dwmac-sun8i DT bindings have some issue on how to handle
integrated PHY and was reverted in last RC of 4.13.
But now we have a solution so we need to get back that was reverted.
This patch restore all boards DT about dwmac-sun8i
This reverts partially commit fe45174b72ae ("arm: dts: sunxi: Revert EMAC changes")
Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Diffstat (limited to 'arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts')
-rw-r--r-- | arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts index e1dba9ffa94b..f2292deaa590 100644 --- a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts +++ b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts @@ -52,6 +52,7 @@ compatible = "sinovoip,bpi-m2-plus", "allwinner,sun8i-h3"; aliases { + ethernet0 = &emac; serial0 = &uart0; serial1 = &uart1; }; @@ -111,6 +112,24 @@ status = "okay"; }; +&emac { + pinctrl-names = "default"; + pinctrl-0 = <&emac_rgmii_pins>; + phy-supply = <®_gmac_3v3>; + phy-handle = <&ext_rgmii_phy>; + phy-mode = "rgmii"; + + allwinner,leds-active-low; + status = "okay"; +}; + +&external_mdio { + ext_rgmii_phy: ethernet-phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <0>; + }; +}; + &ir { pinctrl-names = "default"; pinctrl-0 = <&ir_pins_a>; |