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| author | Jorik Jonker <jorik@kippendief.biz> | 2016-09-12 20:12:43 +0200 |
|---|---|---|
| committer | Maxime Ripard <maxime.ripard@free-electrons.com> | 2016-09-21 10:48:08 +0200 |
| commit | e3d11d3c45c5ef6dac68b49f68ce2bc6d6ddefce (patch) | |
| tree | b0129c3b40d0e0390314e8559de01ee9afc691a5 /arch/arm/boot/dts/sun8i-h3.dtsi | |
| parent | ARM: dts: sun9i: a80-optimus: Disable EHCI1 (diff) | |
| download | linux-e3d11d3c45c5ef6dac68b49f68ce2bc6d6ddefce.tar.xz linux-e3d11d3c45c5ef6dac68b49f68ce2bc6d6ddefce.zip | |
dts: sun8i-h3: add pinmux definitions for UART2-3
These are the pinmux definitions for UART2-3 on H3. These UARTs can only
be muxed to these pins, so _a and @0 do not really make sense. I have
left out RTS/CTS, since these are rarely used. These can easily be
enabled using an additional pinmux set.
Signed-off-by: Jorik Jonker <jorik@kippendief.biz>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Diffstat (limited to 'arch/arm/boot/dts/sun8i-h3.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/sun8i-h3.dtsi | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi index 6d83b8674201..9571512fdd77 100644 --- a/arch/arm/boot/dts/sun8i-h3.dtsi +++ b/arch/arm/boot/dts/sun8i-h3.dtsi @@ -373,6 +373,20 @@ allwinner,drive = <SUN4I_PINCTRL_10_MA>; allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; }; + + uart2_pins: uart2 { + allwinner,pins = "PA0", "PA1"; + allwinner,function = "uart2"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; + + uart3_pins: uart3 { + allwinner,pins = "PG13", "PG14"; + allwinner,function = "uart3"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; }; timer@01c20c00 { |