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author | Jernej Skrabec <jernej.skrabec@siol.net> | 2020-08-24 21:36:49 +0200 |
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committer | Maxime Ripard <maxime@cerno.tech> | 2020-08-25 10:37:29 +0200 |
commit | 3658a2b7f3e16c7053eb8d70657b94bb62c5a0f4 (patch) | |
tree | 34411ee5b172705d1f18008255ebeb851ca8e44d /arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts | |
parent | Linux 5.9-rc1 (diff) | |
download | linux-3658a2b7f3e16c7053eb8d70657b94bb62c5a0f4.tar.xz linux-3658a2b7f3e16c7053eb8d70657b94bb62c5a0f4.zip |
ARM: dts: sun8i: r40: bananapi-m2-ultra: Fix dcdc1 regulator
DCDC1 regulator powers many different subsystems. While some of them can
work at 3.0 V, some of them can not. For example, VCC-HDMI can only work
between 3.24 V and 3.36 V. According to OS images provided by the board
manufacturer this regulator should be set to 3.3 V.
Set DCDC1 and DCDC1SW to 3.3 V in order to fix this.
Fixes: da7ac948fa93 ("ARM: dts: sun8i: Add board dts file for Banana Pi M2 Ultra")
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20200824193649.978197-1-jernej.skrabec@siol.net
Diffstat (limited to 'arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts')
-rw-r--r-- | arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts b/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts index 42d62d1ba1dc..ea15073f0c79 100644 --- a/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts +++ b/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts @@ -223,16 +223,16 @@ }; ®_dc1sw { - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; regulator-name = "vcc-gmac-phy"; }; ®_dcdc1 { regulator-always-on; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - regulator-name = "vcc-3v0"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc-3v3"; }; ®_dcdc2 { |