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author | Chen-Yu Tsai <wens@csie.org> | 2016-01-21 06:26:42 +0100 |
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committer | Maxime Ripard <maxime.ripard@free-electrons.com> | 2016-01-25 00:01:21 +0100 |
commit | 8826532c76da7e6f157aa319dbf358c067f5877f (patch) | |
tree | f67906b9ebc0ac733e131d3d1677b0bae06e2935 /arch/arm/boot/dts/sun9i-a80-cubieboard4.dts | |
parent | ARM: dts: sun9i: a80-optimus: Enable hardware reset and HS-DDR for eMMC (diff) | |
download | linux-8826532c76da7e6f157aa319dbf358c067f5877f.tar.xz linux-8826532c76da7e6f157aa319dbf358c067f5877f.zip |
ARM: dts: sun9i: cubieboard4: Enable hardware reset and HS-DDR for eMMC
mmc2 has a special pin for eMMC hardware reset, which is controllable
from the controller. Add the "mmc-cap-hw-reset" property to denote that
this controller supports this function, and the pins are actually used.
Also increase the signal drive strength for mmc2 pins, for HS-DDR mode
support.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Diffstat (limited to 'arch/arm/boot/dts/sun9i-a80-cubieboard4.dts')
-rw-r--r-- | arch/arm/boot/dts/sun9i-a80-cubieboard4.dts | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/sun9i-a80-cubieboard4.dts b/arch/arm/boot/dts/sun9i-a80-cubieboard4.dts index 382bd9fc5647..eb2ccd0a3bd5 100644 --- a/arch/arm/boot/dts/sun9i-a80-cubieboard4.dts +++ b/arch/arm/boot/dts/sun9i-a80-cubieboard4.dts @@ -111,9 +111,15 @@ vmmc-supply = <®_vcc3v0>; bus-width = <8>; non-removable; + cap-mmc-hw-reset; status = "okay"; }; +&mmc2_8bit_pins { + /* Increase drive strength for DDR modes */ + allwinner,drive = <SUN4I_PINCTRL_40_MA>; +}; + &r_ir { status = "okay"; }; |