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authorChen-Yu Tsai <wens@csie.org>2016-06-15 12:27:46 +0200
committerMaxime Ripard <maxime.ripard@free-electrons.com>2016-07-04 21:18:06 +0200
commit659757c20d58fb876b8e9ef56c10b9b8b7beba00 (patch)
tree008fc1738c9303dda12b4e2cb309c9b0d3653e98 /arch/arm/boot/dts/sun9i-a80-optimus.dts
parentARM: dts: sun9i: cubieboard4: Order nodes by alphabetical order (diff)
downloadlinux-659757c20d58fb876b8e9ef56c10b9b8b7beba00.tar.xz
linux-659757c20d58fb876b8e9ef56c10b9b8b7beba00.zip
ARM: dts: sun9i: a80-optimus: Order nodes by alphabetical order
Move the mmc nodes above the ohci nodes for proper ordering by name. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Diffstat (limited to 'arch/arm/boot/dts/sun9i-a80-optimus.dts')
-rw-r--r--arch/arm/boot/dts/sun9i-a80-optimus.dts50
1 files changed, 25 insertions, 25 deletions
diff --git a/arch/arm/boot/dts/sun9i-a80-optimus.dts b/arch/arm/boot/dts/sun9i-a80-optimus.dts
index 78fddd9152a5..7fd22e888602 100644
--- a/arch/arm/boot/dts/sun9i-a80-optimus.dts
+++ b/arch/arm/boot/dts/sun9i-a80-optimus.dts
@@ -119,6 +119,31 @@
status = "okay";
};
+&mmc0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc0_pins>, <&mmc0_cd_pin_optimus>;
+ vmmc-supply = <&reg_dcdc1>;
+ bus-width = <4>;
+ cd-gpios = <&pio 7 18 GPIO_ACTIVE_HIGH>; /* PH8 */
+ cd-inverted;
+ status = "okay";
+};
+
+&mmc2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc2_8bit_pins>;
+ vmmc-supply = <&reg_dcdc1>;
+ bus-width = <8>;
+ non-removable;
+ cap-mmc-hw-reset;
+ status = "okay";
+};
+
+&mmc2_8bit_pins {
+ /* Increase drive strength for DDR modes */
+ allwinner,drive = <SUN4I_PINCTRL_40_MA>;
+};
+
&ohci0 {
status = "okay";
};
@@ -157,31 +182,6 @@
};
};
-&mmc0 {
- pinctrl-names = "default";
- pinctrl-0 = <&mmc0_pins>, <&mmc0_cd_pin_optimus>;
- vmmc-supply = <&reg_dcdc1>;
- bus-width = <4>;
- cd-gpios = <&pio 7 18 GPIO_ACTIVE_HIGH>; /* PH8 */
- cd-inverted;
- status = "okay";
-};
-
-&mmc2 {
- pinctrl-names = "default";
- pinctrl-0 = <&mmc2_8bit_pins>;
- vmmc-supply = <&reg_dcdc1>;
- bus-width = <8>;
- non-removable;
- cap-mmc-hw-reset;
- status = "okay";
-};
-
-&mmc2_8bit_pins {
- /* Increase drive strength for DDR modes */
- allwinner,drive = <SUN4I_PINCTRL_40_MA>;
-};
-
&r_ir {
status = "okay";
};