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| author | Chen-Yu Tsai <wens@csie.org> | 2018-01-17 09:46:49 +0100 |
|---|---|---|
| committer | Chen-Yu Tsai <wens@csie.org> | 2018-02-16 05:19:11 +0100 |
| commit | 61cf3ed092c68c9652271320b3808ecf4f5ed12f (patch) | |
| tree | 73eb0804c0a7c709bf279d2087f8cde1a7f7fd26 /arch/arm/boot/dts/sun9i-a80.dtsi | |
| parent | ARM: dts: sun9i: Add CCI-400 device nodes for A80 (diff) | |
| download | linux-61cf3ed092c68c9652271320b3808ecf4f5ed12f.tar.xz linux-61cf3ed092c68c9652271320b3808ecf4f5ed12f.zip | |
ARM: dts: sun9i: Add CPUCFG device node for A80 dtsi
CPUCFG is a collection of registers that are mapped to the SoC's signals
from each individual processor core and associated peripherals, such as
resets for processors, L1/L2 cache and other things.
These registers are used for SMP bringup and CPU hotplugging.
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Diffstat (limited to 'arch/arm/boot/dts/sun9i-a80.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/sun9i-a80.dtsi | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/sun9i-a80.dtsi b/arch/arm/boot/dts/sun9i-a80.dtsi index 85fb800af8ab..85ecb4d64cfd 100644 --- a/arch/arm/boot/dts/sun9i-a80.dtsi +++ b/arch/arm/boot/dts/sun9i-a80.dtsi @@ -363,6 +363,11 @@ #reset-cells = <1>; }; + cpucfg@1700000 { + compatible = "allwinner,sun9i-a80-cpucfg"; + reg = <0x01700000 0x100>; + }; + mmc0: mmc@1c0f000 { compatible = "allwinner,sun9i-a80-mmc"; reg = <0x01c0f000 0x1000>; |