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| author | Chen-Yu Tsai <wens@csie.org> | 2018-03-08 16:00:11 +0100 |
|---|---|---|
| committer | Chen-Yu Tsai <wens@csie.org> | 2018-03-10 09:13:40 +0100 |
| commit | 651f97f58bbb43670e9c2d365938f4582ce40423 (patch) | |
| tree | 51737d111f1af0c1fa283e202fceeba31e070df3 /arch/arm/boot/dts/sun9i-a80.dtsi | |
| parent | ARM: dts: sun8i: h3: Add eMMC for NanoPi M1 Plus (diff) | |
| download | linux-651f97f58bbb43670e9c2d365938f4582ce40423.tar.xz linux-651f97f58bbb43670e9c2d365938f4582ce40423.zip | |
ARM: dts: sun9i: Add enable-method for SMP support for the A80 SoC
Using the enable-method property for SMP support would allow future PSCI
implementations to override any in-OS support. This is better than just
matching against the machine compatible, and then having to determine
whether other methods are available or not.
This adds enable-method properties to all CPU nodes.
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Diffstat (limited to 'arch/arm/boot/dts/sun9i-a80.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/sun9i-a80.dtsi | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/sun9i-a80.dtsi b/arch/arm/boot/dts/sun9i-a80.dtsi index b1c86b76ac3c..82a770a5ba46 100644 --- a/arch/arm/boot/dts/sun9i-a80.dtsi +++ b/arch/arm/boot/dts/sun9i-a80.dtsi @@ -65,6 +65,7 @@ device_type = "cpu"; cci-control-port = <&cci_control0>; clock-frequency = <12000000>; + enable-method = "allwinner,sun9i-a80-smp"; reg = <0x0>; }; @@ -73,6 +74,7 @@ device_type = "cpu"; cci-control-port = <&cci_control0>; clock-frequency = <12000000>; + enable-method = "allwinner,sun9i-a80-smp"; reg = <0x1>; }; @@ -81,6 +83,7 @@ device_type = "cpu"; cci-control-port = <&cci_control0>; clock-frequency = <12000000>; + enable-method = "allwinner,sun9i-a80-smp"; reg = <0x2>; }; @@ -89,6 +92,7 @@ device_type = "cpu"; cci-control-port = <&cci_control0>; clock-frequency = <12000000>; + enable-method = "allwinner,sun9i-a80-smp"; reg = <0x3>; }; @@ -97,6 +101,7 @@ device_type = "cpu"; cci-control-port = <&cci_control1>; clock-frequency = <18000000>; + enable-method = "allwinner,sun9i-a80-smp"; reg = <0x100>; }; @@ -105,6 +110,7 @@ device_type = "cpu"; cci-control-port = <&cci_control1>; clock-frequency = <18000000>; + enable-method = "allwinner,sun9i-a80-smp"; reg = <0x101>; }; @@ -113,6 +119,7 @@ device_type = "cpu"; cci-control-port = <&cci_control1>; clock-frequency = <18000000>; + enable-method = "allwinner,sun9i-a80-smp"; reg = <0x102>; }; @@ -121,6 +128,7 @@ device_type = "cpu"; cci-control-port = <&cci_control1>; clock-frequency = <18000000>; + enable-method = "allwinner,sun9i-a80-smp"; reg = <0x103>; }; }; |